• Title/Summary/Keyword: 속도측정 바이어스오차

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A performance improvement method in the gun fire control system compensating for measurement bias error of the target tracking sensor (표적추적센서의 측정 바이어스 오차 보상에 의한 사격통제장치 성능 향상 기법)

  • Kim, Jae-Hun;Lyou, Joon
    • Journal of the Korea Institute of Military Science and Technology
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    • v.3 no.2
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    • pp.121-130
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    • 2000
  • A practical method is proposed to improve hit probability of the digital gun fire control system, when the measured rate of the tracking sensor becomes biased under some operational situation. For ground moving target it is shown that the well-known Kalman filter which uses position measurement only can be optimally used to eliminate the rate bias error. On the other hand, for 3D moving aircraft we present a new algorithm which incorporate FIR-type filter, which uses position and rate measurement at the same time, and the fixed-lag smoother using position measurement only, and show that it has the optimal performance in terms of both estimation accuracy and response time.

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Measurement Delay Error Compensation for GPS/INS Integrated System (GPS/INS 통합시스템의 측정치 시간지연오차 보상)

  • Lyou Joon;Lim You-Chol
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.41 no.1
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    • pp.1-8
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    • 2004
  • The INS(Inertial Navigation System) provides high rate position, velocity and attitude data with good short-term stability while the GPS(Global Position System) provides position and velocity data with long-term stability. By integrating the INS with GPS, a navigation system can be achieved to Provide highly accurate navigation Performance. For the best performance, time synchronization of GPS and INS data is very important in GPS/INS integrated system But, it is impossible to synchronize them exactly due to the communication and computation time-delay. In this paper, to reduce the error caused by the measurement time-delay in GPS/INS integrated systems, error compensation methods using separate bias Kalman filter are suggested for both the loosely-coupled and the tightly-coupled GPS/INS integration systems. Linearized error models for the position and velocity matching GPS/INS integrated systems are Int derived by linearizing with respect to its time-delay and augmenting the delay-state into the conventional state equations for each case. And then separate bias Kalman Inter is introduced to estimate the time-delay during only initial navigation stage. The simulation results show that the present method is effective enough resulting in considerably less position error.

Systematic Error Correction of Sea Surveillance Radar using AtoN Information (항로표지 정보를 이용한 해상감시레이더의 시스템 오차 보정)

  • Kim, Byung-Doo;Kim, Do-Hyeung;Lee, Byung-Gil
    • Journal of Navigation and Port Research
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    • v.37 no.5
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    • pp.447-452
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    • 2013
  • Vessel traffic system uses multiple sea surveillance radars as a primary sensor to obtain maritime traffic information like as ship's position, speed, course. The systematic errors such as the range bias and the azimuth bias of the two-dimensional radar system can significantly degrade the accuracy of the radar image and target tracking information. Therefore, the systematic errors of the radar system should be corrected precisely in order to provide the accurate target information in the vessel traffic system. In this paper, it is proposed that the method compensates the range bias and the azimuth bias using AtoN information installed at VTS coverage. The radar measurement residual error model is derived from the standard error model of two-dimensional radar measurements and the position information of AtoN, and then the linear Kalman filter is designed for estimation of the systematic errors of the radar system. The proposed method is validated via Monte-Carlo runs. Also, the convergence characteristics of the designed filter and the accuracy of the systematic error estimates according to the number of AtoN information are analyzed.

Measurement of error estimation for velocity-aided SDINS using separate-bias Kalman filter (바이어스 분리 칼만필터를 이용한 속도보정 SDINS의 측정오차 추정)

  • Jeon, Chang-Bae;Lyou, Joon
    • Journal of Institute of Control, Robotics and Systems
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    • v.4 no.1
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    • pp.56-61
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    • 1998
  • The velocity measurement error in the velocity-aided SDINS on the maneuvering vehicle is unavoidable and degrades the performance of the SDINS. The characteristics of the velocity measurement error can be modeled as a random bias. This paper proposes a new method for estimating the velocity measurement error in the SDINS. The generalized likelihood ratio test is used for detecting the error and a modified separate-bias Kalman filter in the feedback configuration is suggested for estimating the magnitude of the velocity measurement error.

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Guidance Filter Design Based on Strapdown Seeker and MEMS Sensors (스트랩다운 탐색기 및 MEMS 센서를 이용한 유도필터 설계)

  • Yun, Joong-Sup;Ryoo, Chang-Kyung;Song, Taek-Lyul
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.37 no.10
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    • pp.1002-1009
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    • 2009
  • Precision guidance filter design for a tactical missile with a strapdown seeker aided by low-cost strapdown sensors has been addressed in this paper. The low-cost strapdown sensors consist of an IMU with 3-axis accelerometers and gyroscopes, 3-axis magnetometers, and a barometer. Missile's position, velocity, attitude, and bias error of the barometer are considered as state variables. Since the state and measurement equations are highly nonlinear, we adopt UKF(Unscented Kalman Filter). The proposed guidance filter has a function of a navigation filter if target position error is not considered. In the case that the target position error is introduced, the proposed filter can effectively estimate the relative states of the missile to the true target. For specific engagement scenarios, we can observe that observability problems occur.

Design of a 12 Bit CMOS Current Cell Matrix D/A Converter (12비트 CMOS 전류 셀 매트릭스 D/A 변환기 설계)

  • Ryu, Ki-Hong;Yoon, Kwang-Sub
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.8
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    • pp.10-21
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    • 1999
  • This paper describes a 12bit CMOS current cell matrix D/A converter which shows a conversion rate of 65MHz and a power supply of 3.3V. Designed D/A converter utilizes current cell matrix structure with good monotonicity characteristic and fast settling time, and it is implemented by using the tree structure bias circuit, the symmetrical routing method with ground line and the cascode current switch to reduce the errors of the conventional D/A converter caused by a threshold voltage mismatch of current cells and a voltage drop of the ground line. The designed D/A converter was implemented with a $0.6{\mu}m$ CMOS n-well technology. The measured data shows a settling time of 20ns, a conversion rate of 50 MHz and a power dissipation of 35.6mW with a single power supply of 3.3V. The experimental SNR, DNL, and INL of the D/A converter is measured to be 55dB, ${\pm}0.5LSB$, and ${\pm}2LSB$, respectively.

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A Signal Readout System for CNT Sensor Arrays (CNT 센서 어레이를 위한 신호 검출 시스템)

  • Shin, Young-San;Wee, Jae-Kyung;Song, In-Chae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.9
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    • pp.31-39
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    • 2011
  • In this paper, we propose a signal readout system with small area and low power consumption for CNT sensor arrays. The proposed system consists of signal readout circuitry, a digital controller, and UART I/O. The key components of the signal readout circuitry are 64 transimpedance amplifiers (TIA) and SAR-ADC with 11-bit resolution. The TIA adopts an active input current mirror (AICM) for voltage biasing and current amplification of a sensor. The proposed architecture can reduce area and power without sampling rate degradation because the 64 TIAs share a variable gain amplifier (VGA) which needs large area and high power due to resistive feedback. In addition, the SAR-ADC is designed for low power with modified algorithm where the operation of the lower bits can be skipped according to an input voltage level. The operation of ADC is controlled by a digital controller based on UART protocol. The data of ADC can be monitored on a computer terminal. The signal readout circuitry was designed with 0.13${\mu}m$ CMOS technology. It occupies the area of 0.173 $mm^2$ and consumes 77.06${\mu}W$ at the conversion rate of 640 samples/s. According to measurement, the linearity error is under 5.3% in the input sensing current range of 10nA - 10${\mu}A$. The UART I/O and the digital controller were designed with 0.18${\mu}m$ CMOS technology and their area is 0.251 $mm^2$.