• Title/Summary/Keyword: 소프트웨어 소모전력

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Mobile Device Battery Consumption Analysis Techniques: Evaluation and Future Direction (모바일 디바이스 배터리 소모 분석 기법: 평가 및 발전 방향 제고)

  • Song, Jiyoung;Cho, Chiwoo;Jung, Youlim;Jee, Eunkyoung;Bae, Doo-Hwan
    • Journal of Software Engineering Society
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    • v.27 no.1
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    • pp.1-7
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    • 2018
  • The consumption of mobile device batteries which are limited resources is an important criterion when circuit designers analyze and evaluate circuits. For this reason, researchers conducted researches with different models of battery consumption to analyze power consumption of mobile devices. The battery consumption model generation techniques have various characteristics depending on availability of sensors, run-time model generation, and models for using in verification and testing. However, there is lack of comparison and analysis between varied battery consumption model generation methods. In this research, we compare and evaluate the analysis methods which have been studied so far to support the circuit investigation for circuit designers. Finally, we suggest the direction of researches in battery consumption analysis using the comparison result.

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Study of Instruction-level Current Consumption Modeling and Optimization for Low Power Microcontroller (저전력 마이크로컨트롤러를 위한 명령어 레벨의 소모전류 모델링 및 최적화에 대한 연구)

  • Eom Heung-Sik;Kim Keon-Wook
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.43 no.5 s.311
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    • pp.1-7
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    • 2006
  • This paper presents experimental instruction-level current consumption model for low power microcontroller ATmega128. The accessibility of instruction for internal memory decides power consumption of the microcontroller as much as 17% of difference between access instruction and non-access instruction. The power consumption for the given program will be increased in the proportional to the ratio of memory access instruction and lower level memory access in the hierarchy. Throughout the current consumption model, the power consumption can be predicted and optimized in the direction of reducing the frequency memory access. Also, the various optimization methods are introduced in terms of software and hardware viewpoints.

A Comparison of Power Consumption of Heterogeneous Decoding Methods and Resolutions in Smartphone (스마트폰에서 디코딩 방식과 해상도 차이에 따른 전력 소모량 비교)

  • Yoo, Ji-Sung;Kim, Seon-Tae;Park, Joon-Seok
    • Proceedings of the Korea Information Processing Society Conference
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    • 2012.04a
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    • pp.212-215
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    • 2012
  • 스마트폰에서 동영상 디코딩 방식은 하드웨어 디코딩과 소프트웨어 디코딩 방식이 존재한다. 하드웨어 디코딩은 별도의 비디오코어를 이용하여 하드웨어 가속을 통한 렌더링 방식이며, 소프트웨어 디코딩 방식은 CPU에 의존한 렌더링 방식이다. 본 논문에서는 두 가지 디코딩 방식으로 5가지 해상도의 동영상을 재생하여 전력 소모량을 측정한다. 이를 통해, 하드웨어 디코딩 방식이 전력 소모량에서 갖는 우수성을 입증한다.

Power Consumption Analysis of High-Level Obfuscation for Mobile Software (모바일 소프트웨어를 위한 고급수준 난독처리 기법의 전력 소모량 분석)

  • Lee, Jin-Young;Chang, Hye-Young;Cho, Seong-Je
    • Journal of KIISE:Computing Practices and Letters
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    • v.15 no.12
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    • pp.1008-1012
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    • 2009
  • Obfuscation is known as one of the most effective methods to protect software against malicious reverse engineering transforming the software into more complicated one with still preserving the original semantic. However, obfuscating a program can increase both code size of the program and execution time compared to the original program. In mobile devices, the increases of code size and execution time incur the waste of resources including the increase of power consumption. This paper has analyzed the effectiveness of some high-level obfuscation algorithms as well as their power consumption with implementing them under an embedded board equipped with ARM processor. The analysis results show that there is (are) an efficient obfuscation method(s) in terms of execution time or power consumption according to characteristics of a given program.

Design and Implementation of Low-Power Technique based on Monitoring Workload on Real-Time Operating Systems (실시간 운영체제에서 작업량 관찰에 기반한 저전력 기법의 설계 및 구현)

  • Cho, Moon-Haeng;Jung, Myoung-Jo;Kim, Yong-Hee;Lee, Cheol-Hoon
    • The Journal of the Korea Contents Association
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    • v.7 no.6
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    • pp.69-78
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    • 2007
  • In recent years, embedded mobile systems have been expanding their application domains from embedded portable devices which only execute a specialized application such as MP3 player or digital camcoder to digital convergence devices which execute more complicated applications converged various functionalities such as video and audio play, digital dictionary, DMB, games, phone, etc. As it requires the increasing hardware performance such as more faster CPU and more larger RAM, display, disk size, it has brought about a corresponding increase in power consumption. However, coupled with relatively small gains in battery capacity over recent years, the importance of software architecture including intelligent power management has become paramount. In this paper, we have ported UbiFOSTM with energy saving techniques on the ARM9-based MBA2440 platform. For energy savings, we adapted the dynamic power management and the device power management schemes based on monitoring workload. Experimental results with some well-known applications show that proposed low power technique could save energy up to 24 %.

Hardware and Software Co-Design Platform for Energy-Efficient FPGA Accelerator Design (에너지 효율적인 FPGA 가속기 설계를 위한 하드웨어 및 소프트웨어 공동 설계 플랫폼)

  • Lee, Dongkyu;Park, Daejin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.1
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    • pp.20-26
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    • 2021
  • Recent systems contain hardware and software components together for faster execution speed and less power consumption. In conventional hardware and software co-design, the ratio of software and hardware was divided by the designer's empirical knowledge. To find optimal results, designers iteratively reconfigure accelerators and applications and simulate it. Simulating iteratively while making design change is time-consuming. In this paper, we propose a hardware and software co-design platform for energy-efficient FPGA accelerator design. The proposed platform makes it easy for designers to find an appropriate hardware ratio by automatically generating application program code and hardware code by parameterizing the components of the accelerator. The co-design platform based on the Vitis unified software platform runs on a server with Xilinx Alveo U200 FPGA card. As a result of optimizing the multiplication accelerator for two matrices with 1000 rows, execution time was reduced by 90.7% and power consumption was reduced by 56.3%.

Survey on Software-based Power-Metering Framework for Android Platform (안드로이드 플랫폼을 위한 소프트웨어 기반의 전력 소비 측정 프레임워크 비교)

  • Yi, Jun-min;Noh, Dong-kun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.765-768
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    • 2012
  • Recently, the supply ratio of smart devices application has become increasable, utilization of device increases constantly. At the same time, used application is more gentrified. However, using time of devices is decreased. To solve these problems, many research is studying about the hardware/software. One of them is profiling power consumption by process units. The process can be managed, based on measured energy consumption data. These means that it can efficiently use the residual energy. Application at the stage of program design can analyze and used-energy using the trace by considering the low-power can design. In this paper, we studied software-based power-metering framework for android platform. We survey each process-level power consumption measurement techniques, compare advantages and disadvantages of the technique and propose improved measures.

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Low-Energy Intra-Task Voltage Scheduling using Static Timing Analysis (정적 시간 분석을 이용한 저전력 태스크내 전압 스케줄링)

  • Sin, Dong-Gun;Kim, Ji-Hong;Lee, Seong-Su
    • Journal of KIISE:Computer Systems and Theory
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    • v.28 no.11
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    • pp.561-572
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    • 2001
  • Since energy consumption of CMOS circuits has a quadratic dependency on the supply voltage, lowering the supply voltage is the most effective way of reducing energy consumption. We propose an intra-task voltage scheduling algorithm for low-energy hard real-time applications. Based on a static timing analysis technique, the proposed algorithm controls the supply voltage within an individual task boundary. By fully exploiting all the slack times, as scheduled program by the proposed algorithm always complete its execution near the deadline, thus achieving a high energy reduction ratio. In order to validate the effectiveness of the proposed algorithm, we built a software tool that automatically converts a DVS-unaware program into an equivalent low-energy program. Experimental results show that the low-energy version of an MPEG-4 encoder/decoder (converted by the software tool) consumes less than 7~25% of the original program running on a fixed-voltage system with a power-down mode.

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항공기 인증 과정에서 소프트웨어의 승인 프로세스

  • Han, Sang-Ho
    • The Journal of Aerospace Industry
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    • s.68
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    • pp.38-63
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    • 2006
  • 디지털 하드웨어가 값이 싸다는 것과 그 외형적 크기도 작아지고 있으며 소모 전력도 적다는 경향 때문에 항공에서 디지털 시스템의 사용이 현저하게 증가하게 되었다. 일부에서는 디지털 실용화가 아날로그 기반의 설계를 대체하기까지 하고 있으며 전연 새로운 개념이 도입되고 있는데 이는 모두 디지털 시스템 덕분이다. 대부분의 경우 항공에서 디지털 시스템은 안전에 치명적인 특성을 가지며 해당 소프트웨어의 오류로 항공기의 지속적인 비행과 착륙을 할 수 없는 고장을 유발할 수 있다. 이러한 이유로 항공기에 적용되는 소프트웨어의 인증이 대두되는 것이다. 이 글에서는 향후 우리나라에서도 전개될 소프트웨어의 인증에 대비하여 인증의 기준으로 적용되고 있는 RTCA DO-178B의 내용을 살펴보고 전형적인 항공기 또는 TSOA 인증과정에서의 소프트웨어의 승인 프로세스를 살펴보았다.

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