• Title/Summary/Keyword: 설계 방식

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A Study on the CAM Designed by Adopting Best-Match Method using Parallel Processing Architecture (병렬 처리 구조를 이용한 최적 정합 방식 CAM 설계에 관한 연구)

  • 김상복;박노경;차균현
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.6
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    • pp.1056-1063
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    • 1994
  • In this paper a content addressable memory (CAM) is designed by adopting best-match method. It has a single processing element(PE) architecture with high computational efficiency and throughput. It is composed of three main functional blocks(input MUX, best-match CAM, control part). It support fully parallel processing. Logic simulation is completed by using QUICKSIM, Circuit simulation is performanced by using HSPICE. Its layout is based on the ETRI 3 m n-well process design rules. Its maximum operating frequency is 20 MHz.

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A Design of a CMOS Circuit of Asynchronous Adders Based on Carry Selection and Carry Bypass (캐리 선택과 캐리 우회 방식에 의거한 비동기 가산기의 CMOS 회로 설계)

  • Jung, Sung-Tae
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.11
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    • pp.2980-2988
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    • 1998
  • This paper describes the design of asynchronous adders based on carry selection and carry bypass techniques. The designs are faster than existing asynchronous adders which are based on ripple carry technique. It is caused by reducing the carry transfer time by using carry selection and carry bypass techniques. Also, the design uses tree structure to reduce the completion sensing time. The proposed adders are designed with CMOS domino logic and experimented with HSPICE simulator. Experimental results show that the proposed adders can be faster about 50% in average cases than previous ripple carry adders.

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LVQ Network Design using SOM (SOM을 이용한 LVQ 네트워크 설계)

  • 정경권;이용구;엄기환
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.40 no.5
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    • pp.280-288
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    • 2003
  • In this paper, we propose a design method of the LVQ network using the SOM. The proposed method determines subclasses and initial reference vectors of the LVQ network using the SOM. The efficacy of the proposed method is verified by means of simulations on iris data of Fisher and character recognition. The results show that the proposed method improves considerably on the performance of the conventional LVQ network.

On the design of 64bit CLSA adder using the optimized algorithm (최적 알고리즘을 이용한 64비트 CLSA 가산기 설계)

  • 이영훈;김상수
    • Journal of the Korea Society of Computer and Information
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    • v.4 no.3
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    • pp.47-52
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    • 1999
  • The efficiency of an adder which plays an important role in micro-process and DSP greatly depends on the kinds of carry generation method. So in this paper. I used both CLA excellent in the speed and CSA best in the chip-size. The 64bit adder is designed with high speed which is two optimum combination. Therefore this paper suggested the way of CLSA improving both speed and chip-size. and proved the excellence of the designed circuit.

A Study on the Application Methodology of Set-based Design Approach of Outrigger System based on Lean Process (린 프로세스 기반 아웃리거 시스템의 Set-based Design 적용 방안에 관한 연구)

  • Lee, Seung-Il;Cho, Young-Sang
    • Korean Journal of Construction Engineering and Management
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    • v.12 no.4
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    • pp.50-58
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    • 2011
  • Lean concept is management philosophy that defines a customer's value and eliminates wasteful and impeditive factors. Management philosophy of Lean in the construction industry is referred to as "Lean Construction". Now this concept has expanded to achieve effective productivity during the design phase. Currently the norm of the domestic design process has been Point-based Design(PBD). It involves selecting a single structurally-feasible design option early and then refining that single design as more information becomes available throughout the design process. This single design is then re-worked until a solution is found that is feasible for all parties. On the contrary, Set-based Design(SBD) is based on lean processes to eliminate waste and improve project productivity. It focuses on keeping the design space as open as long as possible, to allow "subdesign" to advance and not labeling them as secondary in importance. Preserving the maximum number of feasible designs as long as possible reduces the likelihood that rework will be necessary and allows all project participants to utilize their unique expertise to make the project successful. This study proposes that the design methodology of minimizing waste and increasing productivity through SBD of AHP, one of the decision making process so as to compare PBD with SBD and tries to find decision making process and then suggest that application methodology through performs case study of SBD process.

Design of Optimal FIR Filters for Data Transmission (데이터 전송을 위한 최적 FIR 필터 설계)

  • 이상욱;이용환
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.8
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    • pp.1226-1237
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    • 1993
  • For data transmission over strictly band-limited non-ideal channels, different types of filters with arbitrary responses are needed. In this paper. we proposed two efficient techniques for the design of such FIR filters whose response is specified in either the time or the frequency domain. In particular when a fractionally-spaced structure is used for the transceiver, these filters can be efficiently designed by making use of characteristics of oversampling. By using a minimum mean-squared error criterion, we design a fractionally-spaced FIR filter whose frequency response can be controlled without affecting the output error. With proper specification of the shape of the additive noise signals, for example, the design results in a receiver filter that can perform compromise equalization as well as phase splitting filtering for QAM demodulation. The second method ad-dresses the design of an FIR filter whose desired response can be arbitrarily specified in the frequency domain. For optimum design, we use an iterative optimization technique based on a weighted least mean square algorithm. A new adaptation algorithm for updating the weighting function is proposed for fast and stable convergence. It is shown that these two independent methods can be efficiently combined together for more complex applications.

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Mission Trajectory Design using Three-Body Dynamics (3체 역학 방정식을 이용한 위성 임무 궤도 설계)

  • Chung, Tae-Jin;Lee, Na-Young
    • Journal of Satellite, Information and Communications
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    • v.5 no.2
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    • pp.50-56
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    • 2010
  • Most mission trajectory design technologies for space exploration have been utilized the Patched Conic Approximation which is based on Hohmann transfer in two-body problem. The Hohmann transfer trajectory is basically an elliptic trajectory, and Patched Conic Approximation consists of Hohmann transfer trajectories in which each trajectory are patched to the next one. This technology is the most efficient method when considering only one major planet at each patch trajectory design. The disadvantages of the conventional Patched Conic Approach are more fuel (or mass) needed and only conic trajectories are designed. Recent space exploration missions need to satisfy more various scientific or engineering goals, and mission utilizing smaller satellites are needed for cost reduction. The geometrical characteristics of three-body dynamics could change the paradigm of the conventional solar system. In this theoretical concept, one can design a trajectory connecting around the solar system with comparably very small energy. In this paper, the basic three-body dynamics are introduced and a spacecraft mission trajectory is designed utilizing the three-body dynamics.

A method of Implementation in 1000BASE-X PCS layer (1000BASE-X PCS 구현 방안)

  • 이승수;정인택;송상섭
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.5A
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    • pp.873-878
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    • 2001
  • 광케이블을 이용한 기가비트 이더넷은 8B/10B 선로부호 방식을 채택하여 전이중 통신뿐만 아니라 CSMA/CD 방식의 반이중 통신을 지원토록 규정되어 있다. 또한 링크를 공유하고 있는 2대의 1000BASE-X 장치 사이에 구성정보를 교환하여 가장 적합한 통신모드로 동작시킬 수 있는 자동절충 기능을 지원해야 한다. 본 논문에서는 비교적 기능이 간단하고 구현이 용이한 기존의 전이중 방식만의 PCS 설계 방법과 비교하여 반이중 방식까지 지원할 수 있는 PCS 부계층을 기가비트 이더넷 스위치 시스템의 ASIC 칩 안에 구현한 적용 예를 바탕으로 PCS 설계 규격, 구조 및 방법 등을 제시한다.

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SS No.7 트랜잭션 서비스를 위한 상위 프로토콜 설계

  • Cha, Yeong-Uk;Lee, Nam-Hui
    • ETRI Journal
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    • v.10 no.3
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    • pp.170-178
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    • 1988
  • SS(Signalling System) No.7 신호 방식은 통신망 내의 각 노드들 간에 공통적으로 별도의 채널을 이용하여 회선관련 신호 정보 및 비회선 관련 신호 정보를 교환하는 신호방식이다. SS No.7 신호 방식의 각 계위 프로토콜 중에서 비회선 관련 신호 정보를 교환하기 위하여 상위 프로토콜로 TC(Transaction Capabilities)와 TC-User들을 CCITT에서 권고하고 있다. 본 고에서는 국내에 도입할 SS No.7 신호방식의 하위 프로토콜인 SCCP (Signalling Connection Control Part)와 MTP(Message Transfer Part) 프로토콜의 특성에 따른 TC 및 TC-User 프로토콜의 설계시에 고려되어야 할 사항들을 살펴본다.

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