• Journal of Korea Society of Industrial Information Systems
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• v.22 no.3
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• pp.19-26
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• 2017

In this paper, a Linear Error Correction Code, Which is Applicable to Next Generation Wireless Communication System Technology, is Constructed Based on Performance Comparison and Transmission Based on the Premise of High Performance Mobile Rate Enhancement System. This is Because Data Rates are Becoming an Important Issue in Reed-Solomon Codes and Linear Error Code (LDPC) Used in the Physical Layer of Digital Communication and Broadcasting Technologies. Therefore, this paper Simulates the Performance of Reed - Solomon Code and LDPC Applied to Mobile Broadcasting DVB (Digital Video Broadcasting) System and Mobile Broadcasting in Digital Communication and Broadcasting, At this time, Technical Aspects of the Transmission Efficiency and Performance of the LDPC Replacing the Existing Reed-Solomon Code have been Verified from the Viewpoint of Efficiency.

• Convergence Security Journal
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• v.7 no.1
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• pp.29-34
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• 2007

Recently, the distribution and using of the digital multimedia contents are easy by developing the internet application program and related technology. However, the digital signal is easily duplicated and the duplicates have the same quality compare with original digital signal. To solve this problem, there is the multimedia fingerprint which is studied for the protection of copyright. Fingerprinting scheme is a technique which supports copyright protection to track redistributers of electronic information using cryptographic techniques. Only regular user can know the inserted fingerprint data in fingerprinting schemes differ from a symmetric/asymmetric scheme and the scheme guarantee an anonymous before re-contributed data. In this paper, we present a new scheme which is the detection of colluded multimedia fingerprint by neural network. This proposed scheme is consists of the anti-collusion code generation and the neural network for the error correction.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.4 s.310
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• pp.80-87
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• 2006

Recently, the distribution and using of the digital multimedia contents are easy by developing the internet application program and related technology. However, the digital signal is easily duplicated and the duplicates have the same quality compare with original digital signal. To solve this problem, there is the multimedia fingerprint which is studied for the protection of copyright. Fingerprinting scheme is a techniques which supports copyright protection to track redistributors of electronic inform on using cryptographic techniques. Only regular user can know the inserted fingerprint data in fingerprinting schemes differ from a symmetric/asymmetric scheme and the scheme guarantee an anonymous before recontributed data. In this paper, we present a new scheme which is the detection of colluded multimedia fingerprint by neural network. This proposed scheme is consists of the anti-collusion code generation and the neural network for the error correction. Anti-collusion code based on BIBD(Balanced Incomplete Block Design) was made 100% collusion code detection rate about the average linear collusion attack, and the hopfield neural network using (n,k)code designing for the error bits correction confirmed that can correct error within 2bits.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.5 s.311
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• pp.68-75
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• 2006

Multimedia fingerprinting protects multimedia content from illegal redistribution by uniquely marking every copy of the content distributed to each user. Differ from a symmetric/asymmetric scheme, fingerprinting schemes, only regular user can know the inserted fingerprint data and the scheme guarantee an anonymous before recontributed data. In this paper, we present a scheme which is the algorithm using LDPC(Low Density Parity Check) for detection of colluded multimedia fingerprint and correcting errors. This proposed scheme is consists of the LDPC block, Hopfield Network and the algorithm of anti-collusion code generation. Anti-collusion code based on BIBD(Balanced Incomplete Block Design) was made 100% collusion code detection rate about the linear collusion attack(average, AND and OR) and LD% block for the error bits correction confirmed that can correct error until AWGN 0dB.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2003.06a
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• pp.300-303
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• 2003

In this paper, a baseband module of the spread spectrum system with FPGA is designed. A spread spectrum system spreads the signal bandwidth necessary for information transmission. We focused on the design of FEC decoder, especially the convolutional code fo constraint length K=3, rate R=l/2, is designed. For the VHDL design the Xilinx Foundation 3.1 is used. As results, a spread spectrum modem with convolutional coding is designed and we have plan to apply this modem to short distances wireless communication.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.4
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• pp.58-66
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• 2009

Recently the emerging demands of the light-video encoder promotes lots of research efforts on DVC (Distributed Video Coding). As an appropriate video compression method, DVC has been studied, and Wyner-Ziv (WZ) video compression is its one representative structure. The WZ encoder splits the image into two kinds of frames, one is key frame which is compressed by conventional intra coding, and the other is WZ frame which is encoded by WZ coding. The WZ decoder decodes the key frame first, and estimates the WZ frame using temporal correlation between key frames. Estimated WZ frame (Side Information) cannot be the same as the original WZ frame due to the absence of the WZ frame information at decoder. As a result, the difference between the estimated and original WZ frames are regarded as virtual channel noise. The WZ frame is reconstructed by removing noise in side information. Therefore precise noise estimation produces good performance gain in WZ video compression by improving error correcting capability by channel code. But noise cannot be estimated precisely at WZ decoder unless there is good WZ frame information, and generally it is estimated from the difference of corresponding key frames. Also the estimated noise is limited by comparing with frame level noise to reduce the uncertainty of the estimation method. However these methods cannot provide good noise estimation for every frame or each bit plane. In this paper, we propose a noise nodel selection method which chooses a better noise model for each bit plane after generating candidate noise models. Experimental result shows PSNR gain up to 0.8 dB.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.7
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• pp.97-103
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• 2004

In this paper, we propose a high speed block turbo code decoding algorithm and an efficient hardware architecture. The multimedia wireless data communication systems need channel codes which have the high-performance error correcting capabilities. Block turbo codes support variable code rates and packet sizes, and show a high performance due to a soft decision iteration decoding of turbo codes. However, block turbo codes have a long decoding time because of the iteration decoding and a complicated extrinsic information operation. The proposed algorithm using the threshold that represents a channel information reduces the long decoding time. After the threshold is decided by a simulation result, the proposed algorithm eliminates the calculation for the bits which have a good channel information and assigns a high reliability value to the bits. The threshold is decided by the absolute mean and the standard deviation of a LLR(Log Likelihood Ratio) in consideration that the LLR distribution is a gaussian one. Also, the proposed algorithm assigns '1', the highest reliable value, to those bits. The hardware design result using verilog HDL reduces a decoding time about 30% in comparison with conventional algorithm, and includes about 20K logic gate and 32Kbit memory sizes.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.5A
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• pp.484-492
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• 2006

A multi-code biorthogonal code keying(MBCK) system consists of multiple waveform coding block, and the sum of output codewords is transmitted. Drawback of MBCK is that it requires amplifier with high linearity because its output symbol is multi-level. MBCK with constant amplitude preceding blcok(CA-MBCK) has been proposed, which guarantees sum of orthogonal codes to have constant amplitude. Redundant bits of CA-MBCK for constant amplitude coding are not only used to make constant amplitude signal but also used to improve the bit error rate(BER) performance at receiver. In this paper, we proposed a transmission scheme which combine CA-MBCK with $Q^{2}PSK$ to improve bandwidth efficiency of CA-MBCK. The BER performance of the scheme is same that of CA-MBCK in additive white gaussian noise(AWGN). And we showed that BER performance of the proposed system can be improved using redundant bits of constant amplitude preceding.

• Journal of the Institute of Convergence Signal Processing
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• v.11 no.3
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• pp.244-249
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• 2010

The design of error correction code with low complexity has a good attraction for next generation multi-level cell flash memory. Sharing sub-expressions is effective method to reduce complexity and chip size. This paper proposes a new design method of m-bit parallel BCH encoder based on serial linear feedback shift register structure with low complexity using sub-expression. In addition, general algorithm for obtaining the sub-expression is introduced. The sub-expression can be expressed by matrix operation between sub-matrix of generator matrix and sum of two different variables. The number of the sub-expression is restricted by. The obtained sub-expressions can be shared for implementation of different m-parallel BCH encoder. This paper is not focused on solving a problem (delay) induced by numerous fan-out, but complexity reduction, expecially the number of gates.