• Journal of Korea Water Resources Association
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• v.52 no.4
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• pp.265-277
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• 2019

The objective of this study was to develop and verify an effective vortex typed nonfilter nonpoint source pollution reduction device. To verify this pollution reduction device, a total of twelves scenarios (three rainfall intensities${\times}$two states${\times}$two steps) of experiments were conducted using pollutants. First, simulated inflow (rainfall intensity 2.5 mm/hr: $0.00152m^3/s$, rainfall intensity 3.395 mm/hr: $0.00206m^3/s$, rainfall intensity 6.870 mm/hr: $0.00326m^3/s$) was calculated. Second, pollutants (mixture of 25% of four particle sizes) were selected and injected. Third, pollutant removal efficiencies of this device at its initial state and operating states were measured. As a result of analysis based on rainfall intensity, the concentration of pollutants was decreased by the device at initial and operating states at all rainfall intensities. Its pollutant removal efficiency was more than 80%, the standard set by the Ministry of Environment. Its pollutant removal efficiency was gradually increased over time, reaching approximately 90%. Its pollutant removal efficiency was higher in its operating state than that in its initial state. Therefore, nonpoint source pollutants can be effectively removed by this vortex typed nonpoint source pollution reduction device developed in this study.

• Journal of Korea Society of Industrial Information Systems
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• v.24 no.2
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• pp.57-63
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• 2019

In order to facilitate the supply of gradually increasing power demand, it is also necessary to increase the number of power cables for power transmission as well as generation facilities. However, the expansion of electric power cables for supplying power to most urban areas requires a space for installation of additional cables, and the space for installing cables in domestic downtown areas is insufficient at present. The superconducting power cable, which can transmit more power with the same size, has emerged as an alternative to overcome the insufficient cable installation space. However, superconducting power cables, which have the advantage of large power transmission, have some losses in the AC (Alternating Current) system. Therefore, the design and analysis of AC losses are essential to introduce superconducting power cables in AC power transmission systems. In this paper, we analyze the AC loss of various superconducting power cables and consider the actual superconducting power cables and their application to the system. Although there is a theoretical calculation method of AC loss for single superconducting wire, it is not easy to calculate AC loss of superconducting power cable with large number. Therefore, the authors intend to analyze various kinds of superconducting power cable AC loss by using electromagnetic finite element analysis considering E-J (Electric field-Current density) characteristics of superconductivity. The analysis of the AC loss characteristics of the superconducting power cable will be an important factor in the design and development of the superconducting power cable to be applied to the actual system.

• Journal of the Korean Society of Radiology
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• v.16 no.6
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• pp.735-740
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• 2022

In order to reduce side effects such as rectal bleeding in the Brachytherapy, the rectal retractor and wet gauze have been used to increase the distance between the rectum and the tandem. However, there were disadvantages that it was difficult to insert through a narrow entrance into the vagina and poor reproducibility. Also, based on the CT image of the selected catheter, the distance from the tandem to the rectum with or without the balloon catheter was checked and the reduction of the dose to the rectum was confirmed. As a result of the experiment, catheter No. 7 was selected considering the maximum balloon size at a level that does not affect the distance between the start point of the balloon and the end of the catheter, and the ovoid applicator. Based on the CT image of the selected catheter, the degree of expansion according to the presence or absence of the balloon catheter was compared, and it was found that the distance difference was 0.3 - 1 cm. In addition, it was confirmed that a decrease of about 32% was observed due to this distance difference. Therefore, the actual clinical application of the selected catheter can be used as a substitute for the existing rectal retractor and wet gauze.

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.3
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• pp.166-177
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• 2006

The cache size tends to grow in the embedded processor as technology scales to smaller transistors and lower supply voltages. However, larger cache size demands more energy. Accordingly, the ratio of the cache energy consumption to the total processor energy is growing. Many cache energy schemes have been proposed for reducing the cache energy consumption. However, these previous schemes are concerned with one side for reducing the cache energy consumption, dynamic cache energy only, or static cache energy only. In this paper, we propose a hybrid scheme for reducing dynamic and static cache energy, simultaneously. for this hybrid scheme, we adopt two existing techniques to reduce static cache energy consumption, drowsy cache technique, and to reduce dynamic cache energy consumption, way-prediction technique. Additionally, we propose a early wake-up technique based on program counter to reduce penalty caused by applying drowsy cache technique. We focus on level 1 data cache. The hybrid scheme can reduce static and dynamic cache energy consumption simultaneously, furthermore our early wake-up scheme can reduce extra program execution cycles caused by applying the hybrid scheme.

• Journal of the Korea Society of Computer and Information
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• v.17 no.8
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• pp.1-10
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• 2012

This paper proposes design space exploration methodology of many-core processors including multimedia specific instructions to support high-performance and low power ultrasound imaging for portable devices. To explore the impact of multimedia instructions, we compare programs using multimedia instructions and baseline programs with a same many-core processor in terms of execution time, energy efficiency, and area efficiency. Experimental results using a $256{\times}256$ ultrasound image indicate that programs using multimedia instructions achieve 3.16 times of execution time, 8.13 times of energy efficiency, and 3.16 times of area efficiency over the baseline programs, respectively. Likewise, programs using multimedia instructions outperform the baseline programs using a $240{\times}320$ image (2.16 times of execution time, 4.04 times of energy efficiency, 2.16 times of area efficiency) as well as using a $240{\times}400$ image (2.25 times of execution time, 4.34 times of energy efficiency, 2.25 times of area efficiency). In addition, we explore optimal PE architecture of many-core processors including multimedia instructions by varying the number of PEs and memory size.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.81-81
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• 2010

유리기판위에 큰 결정입자를 갖는 실리콘 (폴리 실리콘) 박막을 제조하는 것은 가격저가화 및 대면적화 측면 같은 산업화의 높은 잠재성을 가지고 있기 때문에 그동안 많은 관심을 가지고 연구되어 오고 있다. 다양한 방법을 이용하여 다결정 실리콘 박막을 만들기 위해 노력해 오고 있으며, 태양전지에 응용하기 위하여 연속적이면서 10um이상의 큰 입자를 갖는 다결정 실리콘 씨앗층이 필요하며, 고속증착을 위해서는 (100)의 결정성장방향 등 다양한 조건이 제시될 수 있다. 다결정 실리콘 흡수층의 품질은 고품질의 다결정 실리콘 씨앗층에서 얻어질 수 있다. 이러한 다결정 실리콘의 에피막 성장을 위해서는 유리기판의 연화점이 저압 화학기상증착법 및 아크 플라즈마 등과 같은 고온기반의 공정 적용의 어려움이 있기 때문에 제약 사항으로 항상 문제가 제기되고 있다. 이러한 관점에서 볼때 유리기판위에 에피막을 성장시키는 방법으로 많지 않은 방법들이 사용될 수 있는데 전자 공명 화학기상증착법(ECR-CVD), 이온빔 증착법(IBAD), 레이저 결정화법(LC) 및 펄스 자석 스퍼터링법 등이 에피 실리콘 성장을 위해 제안되는 대표적인 방법으로 볼 수 있다. 이중에서 효율적인 관점에서 볼때 IBAD는 산업화측면에서 좀더 많은 이점을 가지고 있으나, 박막을 형성하는 과정에서 큰 에너지 및 이온크기의 빔 사이즈 등으로 인한 표면으로의 damages가 일어날 수 있어 쉽지 않는 방법이 될 수 있다. 여기에서는 이러한 damage를 획기적으로 줄이면서 저온에서 결정화 시킬 수 있는 cold annealing법을 소개하고자 한다. 이온빔에 비해서 전자빔의 에너지와 크기는 그리드 형태의 렌즈를 통해 전체면적에 조사하는 것을 쉽게 제어할 수 있으며 이러한 전자빔의 생성은 금속 필라멘트의 열전자가 아닌 Ar플라즈마에서 전자의 분리를 통해 발생된다. 유리기판위에 흡수층 제조연구를 위해 DC 및 RF 스퍼터링법을 이용한 비정질실리콘의 박막에 대하여 두께별에 따른 밴드갭, 캐리어농도 등의 변화에 대하여 조사한다. 최적의 조건에서 비정질 실리콘을 2um이하로 증착을 한 후, 전자빔 조사를 위해 1.4~3.2keV의 다양한 에너지세기 및 조사시간을 변수로 하여 실험진행을 한 후 단면의 이미지 및 결정화 정도에 대한 관찰을 위해 SEM과 TEM을 이용하고, 라만, XRD를 이용하여 결정화 정도를 조사한다. 또한 Hall효과 측정시스템을 이용하여 캐리어농도, 이동도 등을 각 변수별로 전기적 특성변화에 대하여 분석한다. 또한, 태양전지용 흡수층으로 응용을 위하여 dark전도도 및 photo전도도를 측정하여 광감도에 대한 결과가 포함된다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.11
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• pp.51-62
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• 2003

This paper presents a novel survivor memeory management and decoding techniques with sequential backward state transition control in the trace back Viterbi decoder. The Viterbi algorithm is an maximum likelihood decoding scheme to estimate the likelihood of encoder state for channel error detection and correction. This scheme is applied to a broad range of digital communication such as intersymbol interference removing and channel equalization. In order to achieve the area-efficiency VLSI chip design with high throughput in the Viterbi decoder in which recursive operation is implied, more research is required to obtain a simple systematic parallel ACS architecture and surviver memory management. As a method of solution to the problem, this paper addresses a progressive decoding algorithm with sequential backward state transition control in the trace back Viterbi decoder. Compared to the conventional trace back decoding techniques, the required total memory can be greatly reduced in the proposed method. Furthermore, the proposed method can be implemented with a simple pipelined structure with systolic array type architecture. The implementation of the peripheral logic circuit for the control of memory access is not required, and memory access bandwidth can be reduced Therefore, the proposed method has characteristics of high area-efficiency and low power consumption with high throughput. Finally, the examples of decoding results for the received data with channel noise and application result are provided to evaluate the efficiency of the proposed method.

• Proceedings of the Korea Technical Association of the Pulp and Paper Industry Conference
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• 2001.11a
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• pp.59-59
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• 2001

전보에서 발표한 바와 같이, 대상 라이너지 제조공장의 습부 운전조건이 지극히 악화되어 있으며 초지 시스템이 지종교체 등의 충격에 전혀 완충작용을 못하는 이유로 는 용수를 포함한 지료의 전하특성을 조절해주지 못하기 때문인 것으로 판단되었다. 특 히 양이온성 고분자로서 유일하게 사용하고 있는 보류향상제가 적절히 작용하지 못하 기 때문에 보류도가 저하되고, 제품내에 보류되지 못한 다량의 미세분이 백수 중에 존 재함으로서 결과적으로 지료의 전기적 특성을 더욱 악화시키는 악순환이 되풀이 되는 것으로 판단되었다. 이와 같이 강하게 음으로 하전된 지료의 전기적 특성을 조절하기 위해서는 양이온성 고분자의 사용량을 증가시키거나 고분자의 전하밀도 또는 분자량을 변화시켜 보는 것이 일반적인 습부첨가제 사용방법이라고 할 수 있다. 따라서 대상 습부공정의 조업조건을 호전시키기 위해서는 적절한 보류향상시스 템의 적용이 가장 시급한 현안이라고 판단되어 선규 보류제의 현장적용시험을 수행한 결과, 백수의 COD와 미세분이 격감하고 탈수성이 향상되어 습부공정의 운전조건이 호 전됨을 관측할 수 있었다. 그러나 2달 이상에 걸친 보류제 현장적용시험 기간 중에 생 산된 라이너지의 제반 물성들은 별다른 변화를 관측할 수 없었다. 이는 적용된 보류제 의 상당 부분이 계내의 미세분과 작용하여 소모되기 때문으로 판단되었다. 본 연구에서는 보류제의 투입 이전에 보류제와는 상대적으로 저분자량과 고 전 하밀도를 가진 고분자 전해질 4종을 사용하여 라이너지 지료의 전하를 중화시키고자 하였으며, 이러한 공정으로 생산된 라이너지의 물성변화를 관측하였다. 물성으로는 파 열강도, 압축강도, 습윤인장강도 및 염료 고착능력 등을 살펴보았다.시아노에틸화한 PYA가 안정된 분자구조를 유지하고 있음을 확인할 수 있었다. 시아노에틸화한 PYA용액의 점탄성 평가를 위하여 storage modulus와 loss modulus 를 분석하였다. 일반적 유변특성 평가 결과 PYA용액은 shear-thinning, pseudoplastic 한 특성을 나타내어 표면사이즈 공정에서의 적용 가능성을 확인할 수 있었다. 사용하는 통계기법 중의 하나인 주성분회귀분석을 실시하였다. 주성분 분석은 여러 개의 반응변수에 대하여 얻어진 다변량 자료의 다차원적인 변 수들을 축소, 요약하는 차원의 단순화와 더불어 서로 상관되어있는 반응변수들 상호간 의 복잡한 구조를 분석하는 기법이다. 본 발표에서는 공정 자료를 활용하여 인공신경망 과 주성분분석을 통해 공정 트러블의 발생에 영향 하는 인자들을 보다 현실적으로 추 정하고, 그 대책을 모색함으로써 이를 최소화할 수 있는 방안을 소개하고자 한다.금 빛 용사 둥과 같은 표면처리를 할 경우임의 소재 표면에 도금 및 용 사에 용이한 재료를 오버레이용접시킨 후 표면처리를 함으로써 보다 고품질의 표면층을 얻기위한 시도가 이루어지고 있다. 따라서 국내, 외의 오버레이 용접기술의 적용현황 및 대표적인 적용사례, 오버레이 용접기술 및 용접재료의 개발현황 둥을 중심으로 살펴봄으로서 아직 국내에서는 널리 알려지지 않은 본 기 술의 활용을 넓이고자 한다. within minimum time from beginning of the shutdown.및 12.36%, $101{\sim}200$일의 경우 12.78% 및 12.44%, 201일 이상의 경우 13.17% 및 11.30%로 201일 이상의 유기의 경우에만 대조구와 삭

• Journal of KIISE:Computing Practices and Letters
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• v.13 no.5
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• pp.252-259
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• 2007

With the rapid development of multimedia applications and wireless communication networks, consumer demand for video-over-wireless capability on mobile computing systems is growing rapidly. In this regard, this paper introduces YUV-aware instructions that enhance the performance and efficiency in the processing of color image and video. Traditional multimedia extensions (e.g., MMX, SSE, VIS, and AltiVec) depend solely on generic subword parallelism whereas the proposed YUV-aware instructions support parallel operations on two-packed 16-bit YUV (6-bit Y, 5-bits U, V) values in a 32-bit datapath architecture, providing greater concurrency and efficiency for color image and video processing. Moreover, the ability to reduce data format size reduces system cost. Experiment results on a representative dynamically scheduled embedded superscalar processor show that YUV-aware instructions achieve an average speedup of 3.9x over the baseline superscalar performance. This is in contrast to MMX (a representative Intel#s multimedia extension), which achieves a speedup of only 2.1x over the same baseline superscalar processor. In addition, YUV-aware instructions outperform MMX instructions in energy reduction (75.8% reduction with YUV-aware instructions, but only 54.8% reduction with MMX instructions over the baseline).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.7
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• pp.97-103
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• 2004

In this paper, we propose a high speed block turbo code decoding algorithm and an efficient hardware architecture. The multimedia wireless data communication systems need channel codes which have the high-performance error correcting capabilities. Block turbo codes support variable code rates and packet sizes, and show a high performance due to a soft decision iteration decoding of turbo codes. However, block turbo codes have a long decoding time because of the iteration decoding and a complicated extrinsic information operation. The proposed algorithm using the threshold that represents a channel information reduces the long decoding time. After the threshold is decided by a simulation result, the proposed algorithm eliminates the calculation for the bits which have a good channel information and assigns a high reliability value to the bits. The threshold is decided by the absolute mean and the standard deviation of a LLR(Log Likelihood Ratio) in consideration that the LLR distribution is a gaussian one. Also, the proposed algorithm assigns '1', the highest reliable value, to those bits. The hardware design result using verilog HDL reduces a decoding time about 30% in comparison with conventional algorithm, and includes about 20K logic gate and 32Kbit memory sizes.