• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.1
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• pp.1-8
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• 2018

Recently, the convolutional neural network shows high performance in many computer vision tasks. However, convolutional neural networks require enormous amount of operation, so it is difficult to adopt them in the embedded environments. To solve this problem, many studies are performed on the ASIC or FPGA implementation, where an efficient representation method is required. The fixed-point representation is adequate for the ASIC or FPGA implementation but causes a performance degradation. This paper proposes a separate optimization of representations for the convolutional layers and the batch normalization layers. With the proposed method, the required bit width for the convolutional layers is reduced from 16 bits to 10 bits for the ResNet-50 neural network. Since the computation amount of the convolutional layers occupies the most of the entire computation, the bit width reduction in the convolutional layers enables the efficient implementation of the convolutional neural networks.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.2
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• pp.288-293
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• 2002

It is possible to classify image data into two types according to the internal representation: one is bitmap, the other is vector. A bitmap image is represented by the two dimensional pixels whereas a vector image is represented by mathematical functions to draw vector objects such as line, rectangle and circle on the two or three dimensional space. So it is necessary for users to use a individual application program for each different image. In this paper, we present a method for design and implementation of image editing tool based on combining of bitmap and vector image.

• Journal of Creative Information Culture
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• v.6 no.1
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• pp.41-48
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• 2020

In order to represent and process spatial data, hierarchical data structures such as a quadtree or a bintree are used. Various approaches for linearly representing the bintree have been proposed. S-Tree has the advantage of compressing the storage space by expressing binary region image data as a linear binary bit stream, but the higher the resolution of the image, the longer the length of the binary bit stream, the longer the storage space and the lower the search performance. In this paper, we construct a hierarchical structure of multiple separated bintrees with a full binary tree structure and express each bintree as two linear binary bit streams to reduce the range required for image search. It improves the overall search performance by performing a simple number conversion instead of searching directly the binary bit string path. Through the performance evaluation by the worst-case space-time complexity analysis, it was analyzed that the proposed method has better search performance and space efficiency than the previous one.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.1
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• pp.130-134
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• 2010

When an XML document is updated in order to represent correctly the structural relationships of nodes in a document, the existing XML labeling schemes relabel nodes or use a labeling scheme that the label of a node has much information. However, the relabeling on large XML documents needs many labeling costs and the labeling scheme that the label of a node has much information requires many storage costs. Therefore, the existing labeling schemes degrade significantly query processing performance on dynamic XML documents. This paper proposes the bit-pattern labeling scheme that solves the problems of the existing schemes. The proposed labeling scheme outperforms the existing labeling schemes because the structural relationships of nodes are represented with a bit string.

• Journal of Creative Information Culture
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• v.5 no.3
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• pp.345-353
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• 2019

Several studies have been proposed to improve storage space efficiency by expressing binary trie data structure as a linear binary bit string. Compact binary tree approach generated using one binary trie increases the key search time significantly as the binary bit string becomes very long as the size of the input key set increases. In order to reduce the key search range, a hierarchical compact binary tree technique that hierarchically expresses several small binary compact trees has been proposed. The search time increases proportionally with the number and length of binary bit streams. In this paper, we generate several binary compact trees represented by full binary tries hierarchically. The search performance is improved by allowing a path for the binary bit string corresponding to the search range to be determined through simple numeric conversion. Through the performance evaluation using the worst time and space complexity calculation, the proposed method showed the highest performance for retrieval and key insertion or deletion. In terms of space usage, the proposed method requires about 67% ~ 68% of space compared to the existing methods, showing the best space efficiency.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.7 s.349
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• pp.115-121
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• 2006

The efficiency of the multiplier largely depends on the representation of finite filed elements such as normal basis, polynomial basis, dual basis, and redundant representation, and so on. In particular, the redundant representation is attractive since it can simply implement squaring and modular reduction. In this paper, we propose an efficient bit-parallel multiplier for GF(2m) defined by an irreducible all-one polynomial using a redundant representation. We modify the well-known multiplication method which was proposed by Karatsuba to improve the efficiency of the proposed bit-parallel multiplier. As a result, the proposed multiplier has a lower space complexity compared to the previously known multipliers using all-one polynomials. On the other hand, its time complexity is similar to the previously proposed ones.

• Proceedings of the Korean Society of Computer Information Conference
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• 2009.01a
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• pp.189-192
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• 2009

게임에서 주인공 캐릭터나 MPC(Non Player Character)가 목적지까지의 경로를 찾는 것은 매우 중요하다. 또한 캐릭터가 이동 중 다양한 오브젝트와 벽을 만나면 이를 회피해야 하며 최단 경로로 이동해야 한다. 본 논문에서는 게임 맵에서 캐릭터의 길 찾기 방법으로 유전 알고리즘을 이용하는 방법을 제안하였다. 특히, 유전 알고리즘의 구성요소 중해 집합을 구성하는 염색체 인코딩 방법을 제안하였다. 본 논문에서 제안한 염색체의 인코딩은 캐릭터의 이동 방향을 비트 스트링으로 표현하였다. 캐릭터가 현재 위치에서 이동할 수 있는 방향은 8 방향이다. 따라서 하나의 방향을 표현하기 위해서는 3비트의 이진스트링으로 나타낼 수 있다. 하나의 해를 나타내는 염색체는 3비트의 이진 스트링을 맵을 나타내는 그래프의 노드 수만큼 할당하여 구성할 수 있다.

• Proceedings of the Korea Multimedia Society Conference
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• 2004.05a
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• pp.679-683
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• 2004

흔히 애니메이션은 캐릭터의 표정이 얼굴에만 나타난다고 생각한다. 하지만 캐릭터의 몸도 얼굴만큼이나 풍부하게 감정을 표현할 수 있다. 이에 따라 본 논문에는 캐릭터 움직임에 따른 동작이 어떻게 변화되고, 생동감 있게 움직일 것인가에 대해 알아보고자 한다. 애니메이션의 기본 동작원리에는 스쿼시, 스트레치, 동작의 속도와 타이밍, 관성, 선행동작, 포물선 따라 움직이기, 인비트위닝 등 많은 것이 있다. 이들 기본동작들은 모두 애니메이션 성공에 크게 영향을 끼친다. 애니메이션에서 캐릭터의 연기는 보는 사람들로 하여금 필요한 동작을 통하여 어떤 표현을 전달할 수 있도록 올바른 타이밍을 가져야한다. 본 논문은 애니메이션 동작을 표현하기 위해 각각의 이미지들의 표현방법에서 감성위주의 느낌들을 어떻게 보여줘야 할 것인가에 대해 다양한 표현들로 나타내었다.

• The Journal of the Acoustical Society of Korea
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• v.18 no.8
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• pp.48-53
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• 1999

This paper presents an analytic derivation of the erroneous effect when the sliding-DFT is implemented in a recursive way with the finite-bit approximation of the twiddle factors. The analysis result is obtained in a closed form equation of the noise-to-signal power ratio(NSR) employing the zero-mean white Gaussian signal as the target input of the DFT. The parameters of the wordlength used in representing the twiddle factors and the blocklength of the DFT appear in the NSR explicitly as its function variables. The derivation is based on the error dynamic equation which is derived from the recursive SDFT, and on the analytic exploration of the statistical characteristics of the approximation coefficients treating them as random variables of having spatial distributions. The analytically derived results are verified through the comparison with the data actually measured from the computer simulation experiment.

• Proceedings of the Korean Information Science Society Conference
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• 2005.11b
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• pp.58-60
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• 2005

대표적인 데이터마이닝 문제중의 하나인 연관규칙 탐사에는 지금까지 Apriori 기반의 많은 알고리즘들이 개발되어 왔다. 본 논문에서는 비트맵을 이용한 Apriori 알고리즘 구현방안을 제시한다. 우선, 핵심연산인 비트맵 논리곱(Bitmap AND)과 비트 카운팅(bit-counting)을 컴퓨터 CPU의 고급 기술을 이용해서 효과적으로 구현할 수 있음을 보인다. 또한, 트랜잭션 데이터를 비트맵으로 표현함으로써, 기존 Apriori와는 달리, 비트맵 논리곱 연산을 획기적으로 줄일 수 있는 방법을 제시한다. BAR의 이러한 구현기법을 통해, Apriori 기반의 최신 구현 방법에 비해, 성능이 최대 30배 정도 향상됨을 보인다.