• Smart Media Journal
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• v.2 no.2
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• pp.39-43
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• 2013

In this paper, we suggest a new technique for WPC parity-check matrix (H-matrix) generation and a corresponding decoding process. The key idea is to construct WPC H-matrix by using a convolutional encoder. It is easy to have many different coderates from a mother code with convolutional codes. However, it is difficult to have many different coderates with LDPC codes. Constructing LDPC Hmatrix based on a convolutional code can easily bring the advantage of convolutional codes to have different coderates. Moreover, both LDPC and convolutional decoding algorithms can be applied altogether in the decoding part. This process prevents the performance degradation of short-length WPC code.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.3
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• pp.384-389
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• 2003

A new two-step soft-output Viterbi algorithm (SOVA) decoder architecture is presented. A significant reduction in the decoding latency can be achieved through the use of the dual-port RAM in the survivor memory structure of the trace-back unit. The system complexity can be lowered due to the determination of the absolute value of the path metric differences inside the add-compare-select (ACS) unit. The proposed SOVA architecture was verified successfully by the functional simulation of Verilog HDL modeling and the FPGA prototyping. The SOVA decoder achieves a data rate very close to that of the conventional Viterbi Algorithm (VA) decoder and the resource consumption of the realized SOVA decoder is only one and a half times larger than that of the conventional VA decoder.

• The KIPS Transactions:PartA
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• v.12A no.1 s.91
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• pp.1-6
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• 2005

This paper presents a new algorithm on low power survivor path memory implementation of the trace-back systolic array Viterbi algorithm. A novel idea is to reuse the already-generated trace-back routes to reduce the number of trace-back operations. And the spurious switching activity of the trace-back unit is reduced by making use of a clock gating method. Using the SYNOPSYS power estimation tool, DesignPower, our experimental result shows the average $40{\%}$ power reduction and $23{\%}$ area increase against the trace-back unit introduced in [1].

• Journal of the Korean Institute of Intelligent Systems
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• v.14 no.5
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• pp.583-586
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• 2004

Transition jitter noise is one of major sources of detection errors in high density recording channels. Implementation complexity of the optimal detector for such channels is high due to the data dependency and correlated nature of the jitter noise. In this paper, two types of hardware efficient sub-optimal detectors are derived by modifying branch metric of Viterbi algorithm and applied to partial response (PR) channels combined with run length limited modulation coding. The additional complexity over the conventional Viterbi algorithm to incorporate the modified branch metric is either a multiplication or an addition for each branch metric in the Viterbi trellis.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.8B
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• pp.1445-1452
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• 2000

In general, the communication channel can be modeled as inter-symbol interference(ISI) and additive white gaussian noise channel. Viterbi algorithm is optimum detector for transmitted data at transmitter, but it needs large computational complexity. For the sake of this problem, adaptive equalizers are employed for channel equalization which is not attractive for mixed phase channel. In this paper, we propose the effective new channel equalizer for mixed phase channel and show the better performance than previous equalizers.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.9C
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• pp.891-897
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• 2003

Partial response maxim likelihood (PRML) is a powerful and indispensable detection scheme for perpendicular magnetic recording channels. The performance of PRML can be improved by incorporating a noise prediction scheme into branch metric computations of Viterbi algorithm (VA). However, the systems constructed by VA have shortcomings in the form of high complexity and cost. In this connection, a new simple detection scheme is proposed by exploiting the minimum run-length parameter d=1 of RLL code. The proposed detection scheme have a slicer instead of Viterbi detector and a noise predictor as a feedback filter. Therefore, to improve BER performance, the proposed detection scheme is extended to dual detection scheme for improving the BER performance. Simulation results show that the proposed scheme has a comparable performance to noise-predictive maximum likelihood (NPML) detector with less complexity when the partial response (PR) target is (1,2,1).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.7 s.361
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• pp.81-89
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• 2007

The Viterbi decoder, which employs the maximum likelihood decoding method, is a critical component in forward error correction for digital communication system. However, lowering power consumption on the Viterbi decoder is a difficult task since the number of paths calculated equals the number of distinctive states of the decoder and the Viterbi decoder utilizes trace-back method. In this paper, we propose a method which minimizes the number of operations performed on the comparator, deployed in the SPEC-T Viterbi decoder implementation. The proposed comparator was applied to the ACSU(Add-Compare-Select Unit) and MPMSU(Minimum Path Metric Search Unit) modules on the decoder. The proposed ACS scheme and MPMS scheme shows reduced power consumption by 10.7% and 11.5% each, compared to the conventional schemes. When compared to the SPEC-T schemes, the proposed ACS and MPMS schemes show 6% and 1.5% less power consumption. In both of the above experiments, the threshold value of 26 was applied.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.10 no.1
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• pp.85-94
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• 2017

In this paper, I proposed a sound model generation and a most frequent model search algorithm for recognizing animal vocalization. The sound model generation algorithm generates a optimal set of models through repeating processes such as the training process, the Viterbi Search process, and the most frequent model search process while adjusting HMM(Hidden Markov Model) structure to improve global recognition rate. The most frequent model search algorithm searches the list of models produced by Viterbi Search Algorithm for the most frequent model and makes it be the final decision of recognition process. It is implemented using MFCC(Mel Frequency Cepstral Coefficient) for the sound feature, HMM for the model, and C# programming language. To evaluate the algorithm, a set of animal sounds for 27 species were prepared and the experiment showed that the sound model generation algorithm generates 27 HMM models with 97.29 percent of recognition rate.

• Journal of Advanced Navigation Technology
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• v.15 no.6
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• pp.1068-1074
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• 2011

In this paper, the proposed scheme is STBC(space-time block codes) system combined with convolution code which is the most popular channel coding to ensure the reliability of data transmission for a high data rate wireless communication. The STBC is one of MIMO(multi-input multi-output) techniques. In addition, this scheme uses a modified viterbi algorithm in order to get a high system gain when data is transmitted. Because we combine STBC and convolution code, the proposed scheme has a little high quantity of computation but it can get a maximal diversity gain of STBC and a high coding gain of convolution code at the same time. Unlike existing viterbi docoding algorithm using Hamming distance in order to calculate branch matrix, the modified viterbi algorithm uses Euclidean distance value between received symbol and reference symbol. Simulation results show that the modified viterbi algorithm improved gain 7.5 dB on STBC 2Tx-2Rx at $BER=10^{-2}$. Therefore the proposed scheme using STBC combined with convolution code can improve the transmission reliability and transmission efficiency.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.6A
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• pp.905-912
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• 1999

In this paper we explain a trellis representation of block codes and derive their MAP decoding algorithm based on it. We also analyze the performance of block codes and concatenated codes with block codes as components by computer simulations, which were performed by changing the structures and constituent codes of concatenated codes. Computer simulations show that soft decision decoding of block codes get an extra coding gain than their hard decision decoding and that concatenated codes using block codes have good performance in the case of high code rate.