• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.1
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• pp.58-70
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• 1990

This paper describes a VLSI implementation of real-time two dimensional DCT processor for the subprimary rate video codec system. The proposed architecture exploits the parallelism and concurrency of the distributes architecture for vector inner product operation of DCT and meets the CCITT performance requirements of video codec for full CSIF 30 frames/sec. It is also shown that this architecture satisfies all the CCITT IDCT accuracy specification by simulating the suggested architecture in bit level. The efficient VLSI disign methodology to design suggested architecture is considered and the module generator oriented design environments are constructed based on SUN 3/150C workstation. Using the constructed design environments. the suggensted architecture have been designed by double metal 2micron CMOS technology. The chip area fo designed 8x8 2-D DA-DCT (Distributed Arithmetic DCT) processor is about 3.9mmx4.8mm.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.6
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• pp.63-72
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• 2005

In this paper, we propose the bit-rate control algorithm for the block based image compression like H.263, H.263+ or MPEG-4. The proposed algorithm is designed to identify the quantization parameter set through the Lagrangian optimization technique based on the well-known linear source model. We set the Lagrangian cost function with the rates and distortion calculated from the linear source model. We calculate the quantization parameter set using the Vitervi algorithm to solve the Lagrangian optimization problem considering the Dquant method of H.263 and MPEG-4. The proposed algorithm improves the video quality by up to 1.5 dB compared with the TMN8 scheme, and is more effective in the video sources with dynamic activities than the consistent quality approaches.

• The KIPS Transactions:PartB
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• v.12B no.7 s.103
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• pp.755-760
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• 2005

To transmit a video bit stream over low bandwith, such as mobile, channels, encoding algorithms for high bit rate like H.263+ are used. In transmitting video bit-streams, packet losses cause severe degradation in image quality. This paper proposes a new algorithm for the recovery of missing or erroneous motion vectors when H.263+ bit-stream is transmitted. Considering that the missing or erroneous motion vectors are closely related with those of neighboring blocks, this paper proposes a temporal-spatial error concealment algorithm. The proposed approach is that missing or erroneous Motion Vectors(MVs) are recovered by clustering the movements of neighboring blocks by their homogeneity. MVs of neighboring blocks we clustered according to ALA(Average Linkage Algorithm) clustering and a representative value for each cluster is determined to obtain the candidate MV set. By computing the distortion of the candidates, a MV with the minimum distortion is selected. Experimental results show that the proposed algorithm exhibits better performance in subjective and objective evaluation than existing methods.

• Journal of Broadcast Engineering
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• v.17 no.1
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• pp.122-128
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• 2012

Because of the system delay caused by the number of feedback retransmission in Distributed Video Coding (DVC) scheme, it is difficult to realize practical DVC in many cases. In this paper low feedback retransmission Distributed Source Coding (DSC) scheme is proposed for practical DVC scheme based on Low-Density Parity-Check (LDPC) codes because DVC system is an specific application of DSC system. This DSC scheme is achieved by using different LDPC codes optimized in each different compression rate and using source revealing scheme. Optimized LDPC codes provide us much better decoding performance which causes the 57% reduced number of iteration. Consequently, the number of feedback retransmission is decreased by 50%.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.2
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• pp.439-446
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• 2011

In this paper, we proposed and implemented a dedicated hardware for Huffman coding which is a method of entropy coding to use compressing multimedia data with video coding. The proposed Huffman codec consists Huffman encoder and decoder. The Huffman encoder converts symbols to Huffman codes using look-up table. The Huffman code which has a variable length is packetized to a data format with 32 bits in data packeting block and then sequentially output in unit of a frame. The Huffman decoder converts serial bitstream to original symbols without buffering using FSM(finite state machine) which has a tree structure. The proposed hardware has a flexible operational property to program encoding and decoding hardware, so it can operate various Huffman coding. The implemented hardware was implemented in Cyclone III FPGA of Altera Inc., and it uses 3725 LUTs in the operational frequency of 365MHz

• Journal of Broadcast Engineering
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• v.27 no.3
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• pp.332-340
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• 2022

Recently, with the development of deep learning and artificial neural network technologies, research on the application of neural network has been actively conducted in the field of video coding. In particular, deep learning-based intra prediction is being studied as a way to overcome the performance limitations of the existing intra prediction techniques. This paper presents a method of context-adaptive neural network-based intra prediction model training and its coding performance analysis. In other words, in this paper, we implement and train a known intra prediction model based on convolutional neural network (CNN) that predicts a current block using contextual information from reference blocks. Then, we integrate the trained model into HM16.19 as an additional intra prediction mode and evaluate the coding performance of the trained model. Experimental results show that the trained model gives 0.28% BD-rate bit saving over HEVC in All Intra (AI) coding mode. In addition, the coding performance change of training considering block partition is also presented.

• Journal of Korea Society of Industrial Information Systems
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• v.15 no.2
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• pp.31-39
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• 2010

VoD(Video-on-Demand) servers have to provide timely processing guarantees for continuous media and reduce the storage and bandwidth requirements for continuous media. The compression techniques make the bit rates of compressed video data significantly variable from frame to frame. A VoD system should be able to provide the client with interactive operations such as fast forward and fast rewind in addition to normal playback of movie. However, interactive operations require additional resources such as storage space, disk bandwidth, memory and network bandwidth. In a stored video application such as VoD system, it is possible that a priori disk access patterns can be used to reserve the system resources in advance. In addition, clients of VoD server spend most of their time in playback mode and the period of time spent in interactive mode is relatively small. In this paper, I present the new buffer management scheme that provides efficient support for interactive operations in a VoD server using variable bit rate continuous media. Simulation results show that our strategy achieves 34% increase of the number of accepted clients over the LRU strategy.

• Journal of Internet of Things and Convergence
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• v.9 no.2
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• pp.11-17
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• 2023

Smoothing is to creating a transmission plan consisting of sections of frames that can be sent at the same transmission rate for compressed and stored video data. Various algorithms have been studied for the smoothing to minimize the number of transmission rate changes, the number of transmission rate changes, and the amount of transmission rate increase. This study evaluates the performance of a smoothing algorithm that minimizes the increase in transmission rates and maximizes the increase in transmission rates when the transmission rate is required to maximize the excess bandwidth to be secured by the server in an environment with limited server bandwidth. The available transmission rates and buffer sizes available in the server are set in various ways and evaluated by the number of fps changes, the minimum fps, the average fps, and fps variability. As a result of the comparison, the proposed algorithm showed excellent average fps and fps variability.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.9C
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• pp.849-860
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• 2007

Because the H.264/AVC standard adopts the variable length coding algorithm, the rate of encoded video bitstream fluctuates a lot as time flows, though its compression efficiency is superior to that of existing standards. When a video is transmitted in real-time over networks with fixed low-bandwidth, it is necessary to control the bit rate which is generated from encoder. Many existing rate control algorithms have been adopting the quadratic rate-distortion model which determines the target bits for each frame. We propose a new rate control algorithm for H.264/AVC video transmission over networks with fixed bandwidth. The proposed algorithm predicts quantization parameter adaptively to reduce video distortion using the quadratic rate-distortion model, which uses the target bit rate and the mean absolute difference for current frame considering pixel difference between macroblocks in the previous and the current frame. On video samples with high motion and scene change cases, experimental results show that (1) the proposed algorithm adapts the encoded bitstream to limited channel capacity, while existing algorithms abruptly excess the limit bit rate; (2) the proposed algorithm improves picture quality with $0.4{\sim}0.9dB$ in average.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.6
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• pp.130-136
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• 2016

HEVC (High Efficiency Video Coding) extension considers screen content as one of its main candidate sources for encoding. Among the tools already included in HEVC version 1, the technique of using transform skip mode allows transform to be skipped and to perform quantization process only. It is known to improve video coding efficiency for screen contents which are characterized to have much high frequency energy. But encoding complexity increases since its encoder should decide whether transform should be used or not in each $4{\times}4$ transform block. Based on statistical correlation between IBC (Intra block copy) and transform skip modes both of which are known effective in screen contents, this paper proposes a combined method of the fast transform skip mode decision and a modified transform skip signaling which signals transform_skip_flag at CU level as a representative transform skip signal. By simulation, the proposed method is shown to reduce encoding time of $4{\times}4$ transform blocks by about 32%.