• Title/Summary/Keyword: 블록 인코딩

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VLSI Architecture of High Performance Huffman Codec (고성능 허프만 코덱의 VLSI 구조)

  • Choi, Hyun-Jun;Seo, Young-Ho;Kim, Dong-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.2
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    • pp.439-446
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    • 2011
  • In this paper, we proposed and implemented a dedicated hardware for Huffman coding which is a method of entropy coding to use compressing multimedia data with video coding. The proposed Huffman codec consists Huffman encoder and decoder. The Huffman encoder converts symbols to Huffman codes using look-up table. The Huffman code which has a variable length is packetized to a data format with 32 bits in data packeting block and then sequentially output in unit of a frame. The Huffman decoder converts serial bitstream to original symbols without buffering using FSM(finite state machine) which has a tree structure. The proposed hardware has a flexible operational property to program encoding and decoding hardware, so it can operate various Huffman coding. The implemented hardware was implemented in Cyclone III FPGA of Altera Inc., and it uses 3725 LUTs in the operational frequency of 365MHz

Parameterized IP Core of Complex-Number Multiplier (파라미터화된 복소수 승산기 IP 코어)

  • 양대성;이승기;신경욱
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.05a
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    • pp.307-310
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    • 2001
  • A parameterized complex-number multiplier (PCMUL) core IP (Intellectual Property), which can be used as an essential arithmetic unit in baseband signal processing of digital communication systems, is described. The bit-width of the multiplier is parameterized in the range of 8-b~24-b and is user-selectable in 2-b step. The PCMUL_GEN, a core generator with GUI, generates VHDL code of a CMUL core for a specified bit-width. The IP is based on redundant binary (RB) arithmetic and a new radix4 Booth encoding/decoding scheme proposed in this paper. It results in a simplified internal structure, as well as high-speed, low-power, and area-efficient implementation. The designed IP was verified using Xilinx FPGA board.

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An Error Control Algorithm for Wireless Video Transmission based on Feedback Channel (무선 비디오 통신을 위한 피드백 채널 기반의 에러복구 알고리즘의 개발)

  • 노경택
    • Journal of the Korea Society of Computer and Information
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    • v.7 no.2
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    • pp.95-100
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    • 2002
  • By feedback channel, the decoder reports the addresses of corrupted macroblocks induced by transmission errors back to the encoder With these negative acknowledgements, the encoder can make the next frame having propagated errors by using forward dependency based on GOBs and MBs of the frame happening transmission errors. The encoder can precisely calculate and track the propagated errors by examining the backward motion dependency for each of four comer pixels in the current encoding frame until before-mentioned the next frame. The error-propagation effects can be terminated completely by INTRA refreshing the affected macroblocks. Such a fast algorithm further reduce the computation and memory requirements. The advantages of the low computation complexity and the low memory requirement are Particularly suitable for real-time implementation.

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The Efficient Error Resilient Entropy Coding for Robust Transmission of Compressed Images (압축 영상의 강건한 전송을 위한 효과적인 에러 내성 엔트로피 부호화)

  • Cho, Seong-Hwan;Kim, Eung-Sung;Kim, Jeong-Sig
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.7 no.2
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    • pp.206-212
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    • 2006
  • Many image and video compression algorithms work by splitting the input image into blocks and producing variable-length coded bits for each block data. If variable-length coded data are transmitted consecutively, then the resulting coder is highly sensitive to channel errors. Therefore, most image and video techniques for providing some protection to the stream against channel errors usually involve adding a controlled amount of redundancy back into the stream. Such redundancy might take the form of resynchronization markers, which enable the decoder to restart the decoding process from the known state, in the event of transmission errors. The Error Resilient Entropy Code (EREC) is a well known method which can regain synchronization without any redundant information to convert from variable-length code to fixed-length code. This paper proposes an enhancement to EREC, which greatly improves its transmission ability for the compressed image quality without any redundant bits in the event of errors. The simulation result shows that the both objective and subjective quality of transmitted image is enhanced compared with the existing EREC at the same BER(Bit Error Rate).

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Fast Auxiliary Channel Design for Display Port (디스플레이 포트를 위한 고속 보조 채널 설계)

  • Jin, Hyun-Bae;Moon, Yong-Hwan;Jang, Ji-Hoon;Kim, Tae-Ho;Song, Byung-Cheol;Kang, Jin-Ku
    • Journal of IKEEE
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    • v.15 no.2
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    • pp.113-121
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    • 2011
  • This paper presents the design of a fast auxiliary channel bus for DisplayPort 1.2 interface. The fast auxiliary channel supports Manchester transactions at 1Mbps and fast auxiliary transactions at 780Mbps. The Manchester transaction is used for managing the main link and auxiliary channel and the fast auxiliary transaction is for data transfer via the auxiliary channel. Simplified serial bus architecture is proposed to be implemented in fast auxiliary channel. The fast auxiliary channel transmitter and receiver are implemented with 7,648 LUTs and 6,020 slice register synthesized in Xilinx Vertex4 FPGA and can be operated at 72MHz to support 720Mbps.

A Study on No-reference Video Quality Assessment of High Definition Television (HDTV 영상의 원본비참조 화질평가 방법에 관한 연구)

  • Kim, Min-Gi;Park, Dea-Woo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.410-413
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    • 2011
  • 2012년 12월 31일을 기점으로 지상파 아날로그 방송이 종료되고 디지털 방송으로 전환되게 되어, 아날로그 방송에서는 크게 느껴지지 못했던, HDTV 영상 화질에 대한 문제가 대두되고 있다. 방송에서 쓰이는 영상의 경우 대부분 원본은 Tape형식이고, 이를 디지털방송에 맞는 형식으로 압축하여 인코딩한 이후 방송에 적합한 형태로 가공하여 서비스하게 되는데, 이때 MPEG압축 방식에 의해 발생하는 블로킹과 같은 새로운 증상에 대한 문제점이 나타나게 된다. 본 논문에서는, HDTV 영상 화질에서의 일반적으로 인간의 시각이 민감하게 반응하는 블록형 잡음에 대하여, 원본비참조 방법으로, 블록들에 대한 객관적인 점수화 방법에 대하여 연구한다. 본 연구를 통해 HDTV의 고품질화와 정보통신 영상 발전에 기여 할 것이다.

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Fast Motion Estimation Algorithm Using Motion Vectors of Neighboring Blocks (인접블록의 움직임벡터를 이용한 고속 움직임추정 방식)

  • So Hyeon-Ho;Kim Jinsang;Cho Won-Kyung;Kim Young-Soo;Suh Doug Young
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.12C
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    • pp.1256-1261
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    • 2005
  • In this paper, we propose a low-power Booth multiplication which reduces the switching activities of partial products during multiplication process. Radix-4 Booth algorithm has a characteristic that produces the Booth encoded products with zero when input data have sequentially equal values (0 or 1). Therefore, partial products have higher chances of being zero when an input with a smaller effective dynamic range of two multiplication inputs is used as a multiplier data instead of a multiplicand. The proposed multiplier divides a multiplication expression into several multiplication expressions with smaller bits than those of an original input data, and each multiplication is computed independently for the Booth encoding. Finally, the results of each multiplication are added. This means that the proposed multiplier has a higher chance to have zero encoded products so that we can implement a low power multiplier with the smaller switching activity. Implementation results show the proposed multiplier can save maximally about $20\%$ power dissipation than a previous Booth multiplier.

Performance Analysis of FEC for Low Power Wireless Sensor Networks (저전력 무선 센서 네트워크를 위한 FEC 성능 분석)

  • Lee, Min-Goo;Park, Yong-Guk;Jung, Kyung-Kwon;Yoo, Jun-Jae;Sung, Ha-Gyeong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.882-885
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    • 2010
  • In view of the severe energy constraint in sensor networks, it is important to use the error control scheme of the energy efficiently. In this paper, we presented FEC (Forward Error Correcting) codes in terms of their power consumption. One method of FEC is RS (Reed-Solomon) coding, which uses block codes. RS codes work by adding extra redundancy to the data. The encoded data can be stored or transmitted. It could have errors introduced, when the encoded data is recovered. The added redundancy allows a decoder to detect which parts of the received data is corrupted, and corrects them. The number of errors which are able to be corrected by RS code can determine by added redundancy. We could predict the lifetime of RS codes which transmitted at 32 byte a 1 minutes. RS(15, 13), RS(31, 27), RS(63, 57), RS(127,115), and RS(255,239) can keep the days of 138, 132, 126, 111, and 103 respectively.

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HEVC TRANSFORM UNIT PRUNING METHOD (HEVC 고속 변환 크기 결정 방법)

  • Kang, Jang-Byung;Lee, Si-Woong;Kim, Jae-Gon;Choi, Haechul
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2012.11a
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    • pp.172-175
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    • 2012
  • 본 논문은 HEVC (high efficiency video coding)의 복잡도 감소를 위한 고속 부호화 방법을 제안한다. 제안 방법은 마지막 0이 아닌 DCT 계수의 위치를 기준으로 블록의 평활성을 판단하고, 이에 따라 Transform Unit의 분할 여부를 빠르게 결정한다. 실험결과를 통해 미미한 0.5% BD-RATE 증가만으로 인코딩 타임을 약 20% 감소시킬 수 있음을 보인다.

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A Study on High Inter Mode Decision Method for H.264/AVC (H.264/AVC용 고속 인터모드 결정 방법 연구)

  • Park, Seung-Sang;Sung, Kyung-Hun;Ko, Jung-Hwan;Kwon, Chul-Hee
    • Proceedings of the Korea Information Processing Society Conference
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    • 2015.10a
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    • pp.1494-1496
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    • 2015
  • 본 논문에서 제안하는 움직임 모드 알고리즘은 움직임 추정 이전에 움직임 모드를 결정하여 기존의 모든 블록에 대해 움직임 추정하는 방식을 선택된 모드에 대해서만 움직임 추정을 진행한다. 다른 모드 결정 방법과 비교했을 때 PSNR은 비슷한 수준이었고 비트율은 적은 것을 실험을 통해 확인 하였다. 반면 다양한 영상의 인코딩 시간을 측정하여 다른 방법보다 평균 30% 시간을 줄일 수 있다.