• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.1591-1592
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• 2015

분기기는 선로가 분기되거나 또는 교차하는 지점에 설치되어 열차의 이동 방향을 안전하게 변경하는 역할을 한다. 그러나, 운영 노선 및 동작 환경에 따라 비정상적인 힘이 분기기에 발생할 경우, 정확한 진단 및 검측을 실시할 수 없는 단점이 있다. 본 논문은 국내에서 사용중인 MJ81 전기선로전환기의 전환기능과 쇄정기능의 특성 분석을 통해 기존에 사용된 분기기 전환력 측정의 문제점을 제시한 후, 이를 해결하기 위한 센서 활용 분기기 전환력 측정 방법을 제시한다.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.11a
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• pp.55-56
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• 2009

내장형 프로세서에 대한 기능요구사항이 날로 증가함에 따라 데이터 처리량을 늘리기 위한 많은 연구들이 지속되어 왔으며, 그중 파이프라인의 컨트롤 해저드로 인한 성능저하를 최소화하기 위한 분기 예측 기법이 다양한 방식으로 제안되어 왔다. 본 논문에서는 분기예측 방법으로서 구현이 간단하고 분기 예측률이 높은 BTB 방식을 32비트 프로세서에 적용하고, 해당 프로세서를 사용하는 SoC 플랫폼을 구성하여 분기예측기법 사용으로 인한 성능향상을 측정하고, 0.18um ASIC 공정을 적용하여 SoC 플랫폼을 구현한 결과를 제시한다.

• Journal of the Korea Society of Computer and Information
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• v.19 no.11
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• pp.63-72
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• 2014

In this paper, we propose a sign language recognition system using SVM and depth camera. Especially, we focus on the Korean sign language. For the sign language system, we suggest two methods, one in hand feature extraction stage and the other in recognition stage. Hand features are consisted of the number of fingers, finger length, radius of palm, and direction of the hand. To extract hand features, we use Distance Transform and make hand skeleton. This method is more accurate than a traditional method which uses contours. To recognize hand posture, we develop the decision tree with the hand features. For more accuracy, we use SVM to determine the threshold value in the decision tree. In the experimental results, we show that the suggested method is more accurate and faster when extracting hand features a recognizing hand postures.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05b
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• pp.468-471
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• 2004

In this paper, a method for classifying fingerprint ridge lines using runlength codes is proposed. To detect feature points(minutiae) in automatic fingerprint identification system(AFIS), classification of fingerprint ridge lines are essential process. The fingerprint ridge lines are classified by run-length coding, and also the end and bifurcation regions in ridge lines are separated. To evaluate the performance of the proposed method, detected feature regions including minutiae points and classified fingerprint ridge lines are shown.

• Journal of the Korean Society of Hazard Mitigation
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• v.8 no.6
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• pp.61-66
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• 2008

In railroad operation, turnout is the device designed to provide very critical functions of moving the train to the neighboring rail. It's the only movable section among the rail and track equipment, which has a complicated structure and as rapid movement between the wheel and rail during operation is unavoidable, the safety and the vibration caused by the impact load of the passing train becomes always the major concern. Response to rail vibration tends to vary depending on physical properties of the rail, rail base and the ground, making it difficult to estimate the quantitative outcome through the measurement. Thus, experimental or empirical approach, rather than an analytic method, has been more commonly employed to deal with the ground vibration. To predict the vibration of the turnout, an experimental value and the measured values are applied in parallel to the factors with a high degree of uncertainty. This study hence was intended to compare and analyze the vibration values measured at the crossing part of manganese turnout by type of train and turnout and distance, as well as predict the intensity of vibration generated at the crossing part of manganese turnout when tilting train accelerates.

• Journal of Korean Society of Steel Construction
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• v.21 no.6
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• pp.563-574
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• 2009

This paper briefly describes the fundamental strategies--path-tracing, pin-pointing, and path-switching--in the computational elastic bifurcation theory of geometrically non-linear single-load-parameter conservative elastic spatial structures. The stability points in the non-linear elasticity may be classified into limit points and bifurcation points. For the limit points, the path tracing scheme that successively computes the regular equilibrium points on the equilibrium path, and the pinpointing scheme that precisely locates the singular equilibrium points were sufficient for the computational stability analysis. For the bifurcation points, however, a specific procedure for path-switching was also necessary to detect the branching paths to be traced in the post-buckling region. After the introduction, a general theory of elastic stability based on the energy concept was given. Then path tracing, an indirect method of detecting multiple bifurcation points, and path switching strategies were described. Next, some numerical examples of bifurcation analysis were carried out for a trussed stardome, and a pin-supported plane circular arch was described. Finally, concluding remarks were given.

• Proceedings of the KIEE Conference
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• 2005.04a
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• pp.203-206
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• 2005

본 연구에서는 카오스 2중 Tent 사상에 의한 랜덤 주파수 캐리어 발생기를 제안하고 있다. 제안된 방법은 2중 텐트사상의 분기트리(Bifurcation Tree)에서 카오스 발생 영역인 $\lambda$=0.99을 이용하여 랜덤 수글 발생시키고 있다. 제안된 방법과 종전의 LCG(Linear Congruential Generator)에 의한 방법의 고조파 스펙트럼을 실험에 의하여 비교 검토하였다.

• Journal of KIISE:Computer Systems and Theory
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• v.26 no.9
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• pp.1158-1165
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• 1999

조건부 분기 명령어(conditional branch instruction)의 잘못된 분기 예측(branch misprediction)은 프로세서의 성능 향상에 심각한 장애 요인이 되고 있다. 특히 시분할(time-sharing) 시스템과 같이 문맥 교환(context switch)이 발생하는 멀티프로그래밍 환경(multiprogramming environment)에서는 더욱 낮은 분기 예측 정확성(branch prediction accuracy)을 보인다. 본 논문에서는 문맥 교환이 발생하는 멀티프로그래밍 환경에서 높은 분기 예측 정확성을 보이는 중첩 분기 예측표 교환(Overlapped Predictor Table Switch, OPTS) 기법을 소개한다. 분기 예측표(predictor table)를 분할하여 각각의 프로세스(process)에 할당하는 OPTS 기법은 문맥 교환의 영향을 최소화함으로써 높은 분기 예측 정확성을 유지하는 분기 예측 방법이다.Abstract There is wide agreement that one of the most important impediments to the performance of current and future pipelined superscalar processors is the presence of conditional branches in the instruction stream. Accurate branch prediction is required to overcome this performance limitation. Many branch predictors have been proposed to help to alleviate this problem, including the two-level adaptive branch predictor, and more recently, hybrid branch predictor. In a less idealized environment, such as a time-sharing system, code of interest involves context switches. Context switches, even at fairly large intervals, can seriously degrade the performance of many of the most accurate branch prediction schemes. In this study, we measure the effect of context switch on the branch prediction accuracy in various situation and show the feasibility of our new mechanism, OPTS(Overlapped Predictor Table Switch), which save and restore branch history table at every context switch.

• The KIPS Transactions:PartA
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• v.16A no.5
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• pp.347-356
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• 2009

Precise branch prediction is a critical factor in the IPC Improvement of modern microprocessor architectures. In addition to the branch prediction accuracy, branch prediction delay have a profound impact on overall system performance as well. However, it tends to be overlooked when the architects design the branch predictor. To tolerate branch prediction delay, this paper proposes Early Start Prediction (ESP) technique. The proposed solution dynamically identifies the start instruction of basic block, called as Basic Block Start Address (BB_SA), and the solution uses BB_SA when predicting the branch direction, instead of branch instruction address itself. The performance of the proposed scheme can be further improved by combining short interval hiding technique between BB_SA and branch instruction. The simulation result shows that the proposed solution hides prediction latency, with providing same level of prediction accuracy compared to the conventional predictors. Furthermore, the combination with short interval hiding technique provides a substantial IPC improvement of up to 10.1%, and the IPC is actually same with ideal branch predictor, regardless of branch predictor configurations, such as clock frequency, delay model, and PHT size.

• Journal of the Korea Society of Computer and Information
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• v.18 no.7
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• pp.1-10
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• 2013

In this paper, the parallel branch instruction is proposed which executes a branch instruction and the frequently used instruction simultaneously to improve the performance of Thumb-2 instruction set architecture. In the proposed approach, new 32-bit parallel branch instructions are introduced which combine 16-bit branch instruction with each of the frequently used 16-bit LOAD, ADD, MOV, STORE, and SUB instructions, respectively. To provide the encoding space of the new instructions, the register field in less frequently executed instructions is reduced, and the new instructions are encoded by using the saved bits. Experiments show that the proposed approach improves performance by an average of 8.0% when compared to the conventional approach.