• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.1
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• pp.99-109
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• 2021

With the recent development of ICT, information exchange through data communication network is increasing. Cryptography is widely used as the base technology to protect it. The initial cryptography technology was developed for military use and authorized only by the nation in the past. However, nowadays, much of the authority was unwillingly transferred to the private due to the pervasive use of ICT. As a result, there have been conflicts between the private demand to use cryptography and the nation's authority. In this paper, we survey the conflicts between nations and the private in the process of formulating the cryptography policy. Morever, we investigate the reality of the cryptography policy in Korea. Our investigations are expected to help the government apply cryptographic control policy in a balanced manner and plan development of cryptography industries. Lastly, we propose a need to establish a cryptanalysis organization and to legislate a legal sanction against fraudulent use of cryptography.

• Journal of IKEEE
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• v.22 no.2
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• pp.233-241
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• 2018

This paper describes a lightweight implementation of a cryptographic processor supporting GCM (Galois/Counter Mode) authenticated encryption (AE) that is based on the two block cipher algorithms of ARIA and AES. It also provides five modes of operation (ECB, CBC, OFB, CFB, CTR) for confidentiality as well as the key lengths of 128-bit and 256-bit. The ARIA and AES are integrated into a single hardware structure, which is based on their algorithm characteristics, and a $128{\times}12-b$ partially parallel GF (Galois field) multiplier is adopted to efficiently perform concurrent processing of CTR encryption and GHASH operation to achieve overall performance optimization. The hardware operation of the ARIA/AES-GCM AE processor was verified by FPGA implementation, and it occupied 60,800 gate equivalents (GEs) with a 180 nm CMOS cell library. The estimated throughput with the maximum clock frequency of 95 MHz are 1,105 Mbps and 810 Mbps in AES mode, 935 Mbps and 715 Mbps in ARIA mode, and 138~184 Mbps in GCM AE mode according to the key length.

• Journal of Internet Computing and Services
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• v.8 no.1
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• pp.79-85
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• 2007

As the use of the computer and networks generalized, the various tasks which are requested secrets can be processed such os the banking transaction. And because of increasing of data exchange, Internet, and mobile networks, the method which is not connected only but also used with many users has been changed. Especially because of the structural problem of the Internet, a lot of information is leaked out when we use the Internet banking. If we check the Internet banking by using an existing cypher method which is either simple of slow, a credit card number, an account number or password will be leaked out. Because the security of information doesn't meet our expectation, we need more powerful cryptography. But, the wasted space-time which is required shouldn,t be ignored when the whole transferred data are encrypted. So, by using both the Elliptic Curve algorithm which is based on mobile networks and the partial encryption of the DTD of XML in this essay, we will implement more faster cypher method of the partial XML.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.13 no.1
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• pp.139-146
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• 2003

In this paper we demonstrate a cryptanalysis of the stream cipher LILI-128. Our approach to analysis on LILI-128 is to solve an overdefined system of multivariate equations. The LILI-128 keystream generato $r^{[8]}$ is a LFSR-based synchronous stream cipher with 128 bit key. This cipher consists of two parts, “CLOCK CONTROL”, pan and “DATA GENERATION”, part. We focus on the “DATA GENERATION”part. This part uses the function $f_d$. that satisfies the third order of correlation immunity, high nonlinearity and balancedness. But, this function does not have highly nonlinear order(i.e. high degree in its algebraic normal form). We use this property of the function $f_d$. We reduced the problem of recovering the secret key of LILI-128 to the problem of solving a largely overdefined system of multivariate equations of degree K=6. In our best version of the XL-based cryptanalysis we have the parameter D=7. Our fastest cryptanalysis of LILI-128 requires $2^{110.7}$ CPU clocks. This complexity can be achieved using only $2^{26.3}$ keystream bits.

• Journal of the Korea Computer Industry Society
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• v.3 no.8
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• pp.1105-1116
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• 2002

This paper has presented three types of key recovery methods, which are known as key escrow, key encapsulation, and trusted third party scheme. we have analyzed the existing key recovery products, which have been developed by the advanced nations for electronic commerce and electronic government. we have also analyzed the key recovery policies proposed by the advanced nations, such as The United States of America, Great Britain, and Japan. In this paper, several key recovery policies are proposed for the e-commerce and e-government system. And we have proposed key recovery scheme for the e-commerce system utilizing the on-line secret sharing scheme based on the Internet and public bulletin board.

• Communications of Mathematical Education
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• v.22 no.4
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• pp.515-531
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• 2008

The visual cryptography scheme is a simple method which can be decoded directly the secret information in human visual system without performing any cryptographic computations. For some secret of image type, we scatter them to random n images and if any threshold (or more) of them are stacked together then original image is visible. In this paper we consider (2,n) visual cryptography scheme and show a construction method of the sample matrix using the rule of binomial coefficients $_nC_2$. This scheme can contribute interesting and effectiveness to the study of mathematics.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.390-393
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• 2014

The importance of this emerging information security and u-Korea or ubiquitous IT era, and the information security is more important. Especially, the small core device password encryption algorithm is an important part of the secure side channel attack cryptographic algorithms. However, it can provide high level of security, an adversary can attack small core device through implementation of cryptographic algorithms. In this paper describes for the Power Analysis attack and analyze the experimental environment.

• Proceedings of the Korea Information Processing Society Conference
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• 2020.05a
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• pp.268-271
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• 2020

최근 동형암호에 대한 관심이 높아진 가운데, 이를 활용한 Cloud Computing 서비스를 구축하기 위한 시도가 이어지고 있다. 기존 동형암호 HW에 대한 연구는 수학적 기능 구현 자체에 중점을 두고 있다. 본 논문에서는 동형암호 CNN inference 모델 설계 과정에서 HW 구현 한계점과 bottleneck들을 수학적 기법이 아닌 HW 특징을 이용해서 극복하는 과정을 서술하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2024.05a
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• pp.419-422
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• 2024

최근 인공지능 기술의 발전과 함께 기계학습과 빅데이터를 융합한 서비스가 증가하게 되었고, 무분별한 데이터 수집과 학습으로 인한 개인정보 유출 위험도가 커졌다. 따라서 프라이버시를 보호하면서 기계학습을 수행할 수 있는 기술이 중요해졌다. 동형암호 기술은 정보 주체자의 개인정보 기밀성을 유지하면서 기계학습을 할 수 있는 방법 중 하나이다. 그러나 평문 크기에 비례하여 암호문 크기와 연산 결과의 노이즈가 커지는 동형암호의 특징으로 인해 기계학습 모델의 예측 정확도가 감소하고 학습 시간이 오래 소요되는 문제가 발생한다. 본 논문에서는 부분 동형암호화된 데이터셋으로 로지스틱 회귀 모델을 학습할 수 있는 기법을 제안한다. 실험 결과에 따르면 제안하는 기법이 종래 기법보다 예측 정확도를 59.4% 향상시킬 수 있었고, 학습 소요 시간을 63.6% 개선할 수 있었다.

• Journal of the Institute of Convergence Signal Processing
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• v.1 no.2
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• pp.177-185
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• 2000

In this paper CPLD design of cryptographic coprocessor which implements SEED algorithm is described. To satisfy trade-off between area and speed, the coprocessor has structure in which 1 round operation is divided into three subrounds and then each subround is executed using one clock. To improve clock frequency, online precomputation scheme for round key is used. To apply the coprocessor to various applications, four operating modes such as ECB, CBC, CFB, and OFB are supported. The cryptographic coprocessor is designed using Altera EPF10K100GC503-3 CPLD device and its operation is verified by encryption or decryption of text files through ISA bus interface. It consists of about 29,300 gates and performance of CPLD chip is about 44 Mbps encryption or decryption rate under 18 Mhz clock frequency and ECB mode.