• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.51-53
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• 2015

In this paper, we propose a new relay selection technique which utilizes interference cancellation with decoding information at multiple relays for buffer-aided successive relaying systems. The transmitting relay is selected if its own transmission to the destination is successful and the number of relays which can successfully decode the data from the source is the maximum at the same time. Simulation results show that the proposed relay selection technique significantly outperforms the conventional relay selection scheme in terms of outage probability.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.8
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• pp.1901-1907
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• 2015

Today's smartphones and user devices are equipped with multiple radio interfaces increasingly. Aggregating theses multiple radio interfaces and using them concurrently will increase a user's communication speed immediately, but at the expense of increased power consumption. In this paper, we develop a mathematical performance model of an adaptive radio activation scheme by which a radio interface is activated only when needed for performance increase and deactivated otherwise. The developed model shows that the adaptive scheme reduces delay significantly and almost halves power consumption below a certain level of traffic input.

• The KIPS Transactions:PartB
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• v.8B no.5
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• pp.507-514
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• 2001

In VOD(Video-on-Demand) system, the real-time interactive service is one of the most important factor to determine the degree of QoS(Quality of Service). In this paper, we propose the head-end system consisted of switching agent and head-end node, which needs to receive the only video stream for multiple users which have requested the same video, to serve the unlimited interactive service which has no service delay and block. The unlimited VCR services can be served by storing the video stream with buffer at client and head-end node. And the proposed algorithm presents the method to enhance the efficiency by buffer, offer the true interactive VOD services to users because all of service requested by clients are processed immediately. In this paper, we implemented the VOD system which has the VCR functions without service delay and block. Simulation results indicate that the proposed algorithm has better performance in the number of service request and time interval.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.37 no.3
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• pp.37-44
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• 2000

In this paper, an efficient hardware architecture of Lempel-Ziv compressor for real time data compression is proposed. The accumulated shift operations in the Lempel-Ziv algorithm are the major problem, because many shift operations are needed to prepare a dictionary buffer and matching symbols. A new efficient architecture for the fast processing of Lempel-Ziv algorithm is presented in this paper. In this architecture, the optimization technique for dictionary size, a new comparing method of multi symbol and a rotational FIFO structure are used to control shift operations easily. For the functional verification, this architecture was modeled by C programming language, and its operation was verified by running on commercial DSP processor. Also, the design of overall architecture in VHDL was synthesized on commercial FPGA chip. The result of critical path analysis shows that this architecture runs well at the input bit rate of 256kbps with 33MHz clock frequency.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.1
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• pp.99-105
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• 2021

Today, a superscalar processor is the basic unit or an essential component of a multi-core processor, SoCs, and GPUs. Hence, a high-performance out-of-order superscalar processor must be adopted for these systems to maximize its performance. The superscalar processor fetches, issues, executes, and writes back multiple instructions per cycle by utilizing reorder buffers and reservation stations to dynamically schedule instructions in a pipelined scheme. In this paper, a fully pipelined out-of-order superscalar processor with speculative execution is designed with VHDL and verified with GHDL. As a result of the simulation, the program composed of ARM instructions is successfully performed.

• Journal of IKEEE
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• v.5 no.1 s.8
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• pp.100-110
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• 2001

In this paper, we investigated several buffer management schemes for the design of shared-memory type ATM switches, which can enhance the utilization of switch resources and can support quality-of-service (QoS) functionalities. Our results show that dynamic threshold (DT) scheme demonstrate a moderate degree of robustness close to pushout(PO) scheme, which is known to be impractical in the perspective of hardware implementation, under various traffic conditions such as traffic loads, burstyness of incoming traffic, and load non-uniformity across output ports. Next, we considered buffer management strategies to support QoS functions, which utilize parameter values obtained via connection admission control (CAC) procedures to set tile threshold values. Through simulations, we showed that the buffer management schemes adopted behave well in the sense that they can protect regulated traffic from unregulated cell traffic in allocating buffer space. In particular, it was observed that dynamic partitioning is superior in terms of QoS support than virtual partitioning.

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.1
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• pp.75-84
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• 2017

It becomes more and more more important for the storage that supports high speed recording and stable access from network environment. As one field of basic science which produces massive astronomical data, VLBI(: Very Long Baseline Interferometer) is now demanding more data writing performance and which is directly related to astronomical observation with high resolution and sensitivity. But most of existing storage are cloud model based for the high throughput of general IT, finance, and administrative service, and therefore it not the best choice for recording of big stream data. Therefore, in this study, we design storage system optimized for high performance of I/O and concurrency. To solve this problem, we implement packet read and writing module through the use of libpcap and pf_ring API on the multi core CPU environment, and build a scalable storage based on software RAID(: Redundant Array of Inexpensive Disks) for the efficient process of incoming data from external network.