• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.1
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• pp.54-65
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• 2000

We propose a parallel acquisition scheme using antenna arrays for initial acquisition of direct-sequence spread-spectrum (DS-SS) signals. The proposed parallel scheme can lower substantially the range of detectable signal-to-noise ratio (SNR) as compared to the conventional parallel scheme with a single antenna. The proposed scheme uses the sum of the independent decision samples from antenna arrays corresponding to an identical subsequence of the pseudonoise (PN) code as a decision variable. We derive the probabilities of detection, missing, and false alarm under an additive white Gaussian noise (AWGN) channel and a flat Rayleigh fading channel. Using these, we get the mean acquisition time of the proposed scheme. From numerical results, we see that the acquisition performance becomes improved continually as the number of antennas increases.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.2
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• pp.56-63
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• 2003

We investigate some implementation factors that affect the performance of multi-rate parallel interference cancellers (PICs) for the international mobile telecommunications-2000 (IMT-2000) 3rd-generation partnership project (3GPP) system. We consider the simple multi-rate PIC [1,2] that can remove effectively multiple access interference (MAI) through block-based detection and sample-based cancellation in asynchronous user environments. The PIC structure has significantly lower complexity as compared with that of the existing scheme, especially as the number of users increases. We analyze the effects of timing error, oversampling rate, unsynchronized users and/or outer-cell interference, and the number of Quantization bits on the PIE performance through extensive computer simulations. The models for such factors and the optimum parameters are drawn. Finally, we evaluate the receiver complexities of the PIC receivers employing using the advanced removal scheme.

• The Transactions of the Korea Information Processing Society
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• v.6 no.6
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• pp.1468-1480
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• 1999

In database systems, join operations are the most complex and time consuming ones which limit performance of such system. Many parallel join algorithms have been proposed for the systems. However, they did not consider data skew, such as attribute value skew (AVS) and join product skew (JPS). In the skewness environments, performance of framework for a uniform load distribution and an efficient parallel join algorithm using the framework to handle AVS and JPS. In our algorithm, we estimate data distributions of input and output relations of join operations using the sampling methodology and evaluate join cost for the estimated data distributions. Finally, using the histogram equalization method we distribute data among nodes to achieve good load balancing among nodes in the local joining phase. For performance comparison, we present simulation model of our algorithm and other join algorithms and present the result of some simulation experiments. The results indicate that our algorithm outperforms other algorithms in the skewed case.

• Journal of KIISE:Software and Applications
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• v.30 no.1_2
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• pp.129-139
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• 2003

The PC cluster architecture is considered as a cost-effective alternative to the existing supercomputers for realizing a high-performance information retrieval (IR) system. To implement an efficient IR system on a PC cluster, it is essential to achieve maximum parallelism by having the data appropriately distributed to the local hard disks of the PCs in such a way that the disk I/O and the subsequent computation are distributed as evenly as possible to all the PCs. If the terms in the inverted index file can be classified to closely related clusters, the parallelism can be maximized by distributing them to the PCs in an interleaved manner. One of the goals of this research is the development of methods for automatically clustering the terms based on the likelihood of the terms' co-occurrence in the same query. Also, in this paper, we propose a method for duplicate distribution of inverted index records among the PCs to achieve fault-tolerance as well as dynamic load balancing. Experiments with a large corpus revealed the efficiency and effectiveness of our method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.11
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• pp.1490-1501
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• 2016

In this paper, we propose an image-based indoor localization system using parallel distributed computing. In order to reduce computation time for indoor localization, an scale invariant feature transform (SIFT) algorithm is performed in parallel by using Apache Spark. Toward this goal, we propose a novel image processing interface of Apache Spark. The experimental results show that the speed of the proposed system is about 3.6 times better than that of the conventional system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.4A
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• pp.189-196
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• 2012

A WAVE(Wireless Access for Vehicular Environment) system is a vehicle communication technology. The system provides the services to prevent vehicle accidents that might occur during driving. Also, it is used to provide various services such as monitoring vehicle management and system failure. However, the scrambler bit operation of WAVE system becomes less efficient in the organizations of software and hardware design because the parallel processing is impossible. Although scrambler algorithm proposed in this paper has different processing speed depending on input data 8 bit, 16 bit, 32 bit, and 64 bit. it improves the processing speed of the operation because it can make parallel processing possible depending on the input unit.

• The Transactions of the Korea Information Processing Society
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• v.5 no.5
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• pp.1333-1344
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• 1998

In comparison to traditional monolithic kernel, the microkernel based operating system has slower speed. But Microkernel based OS suites for multi-computer system, because It has benefits in the modularity and portability point of view. Each unit and memory of a processor must be initialized by using the boot information so that the multi-computer system OS can actively run the function of the system. This paper describes the microkernel initialization of OSF/1 AD3 MISIX that is based on OSF/1 AD3 for SPAX. It will introduce the initialization of microkernel for the SPAX which is High-speed Parallel Processing system in terms of Boot, Initialization related hardware and memory address space construction. This paper will also state the test result based on test environments. Microkernel tested in single node system that has 4 processors.

• The Transactions of the Korea Information Processing Society
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• v.5 no.1
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• pp.40-48
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• 1998

Linear size expanders have been studied in many fields for the practical use, which make it possible to connect large numbers of device chips in both parallel communication systems and parallel computers. One major limitation on the efficiency of parallel computer designs has been the highly cost of parallel communication between processors and memories. Linear order concentrators can be used to construct theoretically optimal interconnection network schemes. Existing explicitly defined constructions are based on expanders, which have large constant factors, thereby rendering them impractical for reasonable sized networks. For these objectives, we use the more detailed matching points in permutation functions, to find out the bigger expansion constant from an equation, $\mid\Gamma_x\mid\geq[1+d(1-\midX\mid/n)]\midX\mid$. This paper presents an improvement of expansion constant on constructing concentrators using expanders, which realizes the reduction of the size in a superconcentrator by a constant factor. As a result, this paper shows an explicit construction of (n, 5, $1-\sqrt{3/2}$) expander. Thus, superconcentrators with 209n edges can be obtained by applying to the expanders of Gabber and Galil's construction.

• Journal of the Korea Society of Computer and Information
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• v.16 no.10
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• pp.11-21
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• 2011

This paper introduces an SIMD(Single Instruction Multiple Data) based parallel processor that efficiently processes massive data inherent in multimedia. In addition, this paper implements MMX(MultiMedia eXtension)-type instructions on the data parallel processor and evaluates and analyzes the performance of the MMX-type instructions. The reference data parallel processor consists of 16 processors each of which has a 32-bit datapath. Experimental results for a JPEG compression application with a 1280x1024 pixel image indicate that MMX-type instructions achieves a 50% performance improvement over the baseline instructions on the same data parallel architecture. In addition, MMX-type instructions achieves 100% and 51% improvements over the baseline instructions in energy efficiency and area efficiency, respectively. These results demonstrate that multimedia specific instructions including MMX-type have potentials for widely used many-core GPU(Graphics Processing Unit) and any types of parallel processors.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.30 no.6
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• pp.21-30
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• 2002

A preconditioned Navier-Stokes code was parallelized by the domain decomposition technique, and the accuracy of the parallelized code was verified through a comparison with the result of a sequential code and experimental data. Parallel performance of the code was examined on a Myrinet based PC-cluster and a Fast-Ethernet system. Speed-up ratio was examined as a major performance parameter depending on the number of processor and the network communication topology. In this test, Myrinet system shows a superior parallel performance to the Fast-Ethernet system as was expected. A test for the dependency on problem size also shows that network communication speed in a crucial factor for parallel performance, and the Myrinet based PC-cluster is a plausible candidate for high performance parallel computing system.