• Title/Summary/Keyword: 병렬시스템

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A Parallel Test Structure for eDRAM-based Tightly Coupled Memory in SoCs (시스템 온 칩 내 eDRAM을 사용한 Tightly Coupled Memory의 병렬 테스트 구조)

  • Kook, In-Sung;Lee, Jae-Min
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.4 no.3
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    • pp.209-216
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    • 2011
  • Recently the design of SoCs(System-on-Chips) in which TCM is embedded for high speed operation increases rapidly. In this paper, a parallel test structure for eDRAM-based TCM embedded in SoCs is proposed. In the presented technique, the MUT (Memory Under Test) is changed to parallel structure and it increases testability of MUT with boundary scan chains. The eDRAM is designed in structure for parallel test so that it can be tested for each modules. Dynamic test can be performed based on input-output data. The proposed techniques are verified their performance by circuits simulation.

An Efficient Duplication Based Scheduling Algorithm for Parallel Processing Systmes (병렬 처리 시스템을 위한 효율적인 복제 중심 스케쥴링 알고리즘)

  • Park, Gyeong-Rin;Chu, Hyeon-Seung
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.8
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    • pp.2050-2059
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    • 1999
  • Multiprocessor scheduling problem has been an important research area for the past decades. The problem is defined as finding an optimal schedule which minimizes the parallel execution time of an application on a target multiprocessor system. Duplication Based Scheduling (DBS) is a relatively new approach for solving multiprocessor scheduling problems. This paper classifies DBS algorithms into two categories according to the task duplication method used. The paper then presents a new DBS algorithm that extracts the strong features of the two categories of DBS algorithms. The simulation study shows that the proposed algorithm achieves considerable performance improvement over existing DBS algorithms with similar time complexity.

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A Striping Policy for Extension of a Parallel VOD Server (병렬 VOD 서버의 확장을 위한 스트라이핑 기법)

  • Choi, Sook-Young;Yoo, Kwan-Joung
    • Journal of KIISE:Information Networking
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    • v.28 no.3
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    • pp.426-434
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    • 2001
  • Striping is a scheme that partitions data into blocks and distributes the blocks on different servers in a well defined order and thus could improve system capacity through load balance. In this paper, we propose a parallel VOD server and striping policies for load balancing when extra storage nodes are attached to a parallel VOD server for insufficient disk space in that VOD server. When new video data is stored on the attached storage node, the node may be overloaded. Since it decreases the system bandwidth, appropriate striping policies are required. We therefore present three striping policies that move some block of data o existing nodes into the new node and distribute the new data across all the storage nodes including the new node. Our experiment result shows that FSM bi-direction is the most effective technique.

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MediaFrame: Parallel multimedia system architecture through HTTP redirection (미디어 프레임: HTTP 리디렉션을 통한 병렬 멀티미디어 시스템 구조)

  • Kim, Seong-Ki;Han, Sang-Yong
    • The KIPS Transactions:PartA
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    • v.14A no.1 s.105
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    • pp.15-24
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    • 2007
  • As a single video server exposes its limitation in scalability, capability, fault-tolerance, and cost-efficiency, solutions of this limitation emerge. However, these solutions have their own problems that will be discussed in this paper. To solve these problems and exploit various video silvers, we designed a parallel multimedia system architecture that supported a content-aware routing to heterogeneous personal computer (PC), operating system (OS), video servers through a HTTP-level redirection. We also developed a prototype, added different video servers into the prototype, and measured its overheads.

An Efficient Central Queue Management Algorithm for High-speed Parallel Packet Filtering (고속 병렬 패킷 여과를 위한 효율적인 단일버퍼 관리 방안)

  • 임강빈;박준구;최경희;정기현
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.7
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    • pp.63-73
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    • 2004
  • This paper proposes an efficient centralized sin91e buffer management algorithm to arbitrate access contention mon processors on the multi-processor system for high-speed Packet filtering and proves that the algorithm provides reasonable performance by implementing it and applying it to a real multi-processor system. The multi-processor system for parallel packet filtering is modeled based on a network processor to distribute the packet filtering rules throughout the processors to speed up the filtering. In this paper we changed the number of processors and the processing time of the filtering rules as variables and measured the packet transfer rates to investigate the performance of the proposed algorithm.

Real-Time Monitoring of Resource for Distributed/Parallel Framework on the Web (웹 기반 분산/병렬 프레임워크상에서 실시간 자원 모니터링)

  • Kim, Su-Ja;Jeong, Jae-Hong;Song, Eun-Ha;Han, Sung-Kook;Joo, Su-Chong;Jeong, Young-Sik
    • Proceedings of the Korea Information Processing Society Conference
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    • 2003.05a
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    • pp.117-120
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    • 2003
  • 웹의 다양한 자원을 이용하여 고성능 작업 처리를 요구하는 분산/병렬 시스템은 균형적인 작업 할당을 위해 각 호스트의 성능 평가가 중요하다. 하지만 성능 평가에 대한 지속적인 신뢰하기가 어려우며 뿐만 아니라, 작업 도중 호스트의 성능 변화를 예측하기가 어렵다. 성능 변화에 따른 효율적인 작업 스케줄링이 필요하며, 자원 관리자는 작업을 수행중인 호스트에 대한 모니터가 요구된다. 본 논문에서는 자원 관리자와 시스템 관리자에게 효율적인 자원 정책을 제안하기 위해 각 호스트의 자원을 모니터하고, 분산/병렬 시스템의 작업 할당 메커니즘에 의해 각 호스트의 성능 평가 기준을 정한다 또한 관리자에게 실시간으로 호스트의 성능 변화에 따른 자원 정보를 관리하도록 다양한 시각화를 제공한다.

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Implementation and Translation of Major OpenMP Directives for Chip Multiprocessor without using OS (단일 칩 다중 프로세서상에서 운영체제를 사용하지 않은 OpenMP 구현 및 주요 디렉티브 변환)

  • Jeun, Woo-Chul;Ha, Soon-Hoi
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.4
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    • pp.145-157
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    • 2007
  • OpenMP is an attractive parallel programming model for a chip multiprocessor because there is no standard parallel programming method for a chip multiprocessor and it is easy to write a parallel program in OpenMP. Then, chip multiprocessor systems can have various architectures according to target application programs. So, we need to implement OpenMP in different way for each system. In this paper, we propose the implementation and the effective translation of major OpenMP directives for a chip multiprocessor without using OS to improve the performance without using special hardware and without extending the OpenMP directives. We present the experimental results on our target platform CT3400.

A Study on The Hybrid Acquisition Performance of MC DS-CDMA Over Multipath Fading Channel (다중경로 환경에서 MC DS-CDMA시스템의 직.병렬 혼합 동기 획득에 관한 연구)

  • Kim, Won-Sbu;Kim, Kyung-Won;Park, Jin-Soo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.10
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    • pp.1968-1976
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    • 2007
  • This paper proposes a hybrid pseudo-noise (PN) code acquisition scheme for Multicarrier Direct Sequence - Code Division Multiple Access (MC DS-CDMA) mobile communication systems on the code acquisition performance for Nakagami-m fading channel. The hybrid acquisition scheme combines parallel search with serial search to cover the whole uncertainty region of the input code phase. It has a much simpler acquisition hardware structure than the total parallel acquisition and can achieve the mean acquisition time (MAT) slightly inferior to that of the total parallel acquisition. The closed-form expressions of the detection and false-alarm probabilities are derived.

Design of Modular DC / DC Converter with Phase-Shifting Topology (위상천이 방식의 모듈형 DC/DC 컨버터 설계)

  • Chai, Yong-Yoong
    • The Journal of the Korea institute of electronic communication sciences
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    • v.14 no.1
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    • pp.81-86
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    • 2019
  • This paper is concerned with a system design that enables a the plurality of switching mode power supplies to be supplied with larger power through a parallel connection. For this purpose, a shunt resistor is placed in series at the output of the constant voltage regulator and the output voltage is sensed and controlled using an arduino. In this paper, two constant-voltage regulators were used for the experiment, but it is possible to generalize for more boards. By using the method that controls the system, the sum of the currents delivered by the two systems to the load was found to be 96% of the current drawn from each board. In case of efficiency, 92.4% efficiency is achieved in the unit board and the efficiency in parallel connection is about 90%.

The Bigdata Processing Environment Building for the Learning System (학습 시스템을 위한 빅데이터 처리 환경 구축)

  • Kim, Young-Geun;Kim, Seung-Hyun;Jo, Min-Hui;Kim, Won-Jung
    • The Journal of the Korea institute of electronic communication sciences
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    • v.9 no.7
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    • pp.791-797
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    • 2014
  • In order to create an environment for Apache Hadoop for parallel distributed processing system of Bigdata, by connecting a plurality of computers, or to configure the node, using the configuration of the virtual nodes on a single computer it is necessary to build a cloud fading environment. However, be constructed in practice for education in these systems, there are many constraints in terms of cost and complex system configuration. Therefore, it is possible to be used as training for educational institutions and beginners in the field of Bigdata processing, development of learning systems and inexpensive practical is urgent. Based on the Raspberry Pi board, training and analysis of Big data processing, such as Hadoop and NoSQL is now the design and implementation of a learning system of parallel distributed processing of possible Bigdata in this study. It is expected that Bigdata parallel distributed processing system that has been implemented, and be a useful system for beginners who want to start a Bigdata and education.