• Journal of Korea Water Resources Association
• /
• v.31 no.1
• /
• pp.45-57
• /
• 1998

The purpose of this paper is to develop a neural network model in order to forecast flood inflow into the reservoir that has the nature of uncertainty and nonlinearity. The model has the features of multi-layered structure and parallel multi-connections. To develop the model. backpropagation learning algorithm was used with the Momentum and Levenberg-Marquardt techniques. The former technique uses gradient descent method and the later uses gradient descent and Gauss-Newton method respectively to solve the problems of local minima and for the speed of convergency. Used data for learning are continuous fixed real values of input as well as output to emulate the real physical aspects. after learning process. a reservoir inflows forecasting model at flood period was constructed. The data for learning were used to calibrate the developed model and the results were very satisfactory. applicability of the model to the Chungju Mlultipurpose Reservoir proved the availability of the developed model.

• Journal of KIISE
• /
• v.43 no.2
• /
• pp.256-268
• /
• 2016

Modern networks consisting of various heterogeneous equipment are often installed in a distributed manner. Thus the NETCONF standard was established to manage networks centrally and efficiently. In this paper, we present a method that integrates each NETCONF layer into a single system based on the results of previous studies. In the RPC Layer, an asynchronous communication channel and parallel processes are possible using multi-threading. In the Operation Layer, operational efficiency is increased by using a data group with dependencies between the equipment configuration data and by improving the data structure, enabling efficiently processing of XML queries even with multiple managers. The data modeling techniques and grouping methods in the Content Layer are presented in detail for interoperability between the Operation Layer and the Content Layer. Finally, the GUI program was implemented and its implementation is reported. We performed an experiment comparing the improved NETCONF with the standard NETCONF to measure factors, such as query processing ratio, query processing speed, and CPU utilization. The improved NETCONF demonstrated excellent query processing ratio and query processing speed, whereas the standard NETCONF had excellent CPU utilization.

• Journal of the Institute of Convergence Signal Processing
• /
• v.11 no.3
• /
• pp.232-237
• /
• 2010

In this paper, a slit light laser range finding method using perspective warping calibration is proposed. This approach has an advantage to acquire relatively high accuracy, although the optical system is nonlinear. In the calibration, we detect the calibration points which are marked on the calibration panel and acquire the center position of the slit light laser in the image, which are used for computing the real positions of the slit light by using perspective warping. A calibration file is obtained by integrating the calibration data with the transition of the panel. The range data is acquired by interpolating the center position of the slit light laser to the calibration coordinates. Experimental results show that the proposed method provides the accuracy of 0.08mm error in depth range of 130mm with the low cost optical system.

• Journal of the Institute of Convergence Signal Processing
• /
• v.8 no.4
• /
• pp.285-292
• /
• 2007

SoC which deploys software modules as well as hardware IPs on a single chip is a major revolution taking place in the implementation of a system design, and high-level synthesis is an important process of SoC design methodology. Recently, SPARK parallelizing high-level synthesis software tool has been developed. It takes a behavioral ANSI-C code as an input, schedules it using code motion and various code transformations, and then finally generates synthesizable RTL VHDL code. Although SPARK employs various loop transformation algorithms, the synthesis results generated by SPARK are not acceptable for basic signal and image processing algorithms with nested loop. In this paper we propose a SoC platform with an application-specific PLD targeting local operations which are feature of many loop algorithms used in signal and image processing, and demonstrate design process which maps behavioral specification with nested loops written in a high-level language (ANSI-C) onto 2D systolic array. Finally the derived systolic array is implemented on the proposed application-specific PLD of SoC platform.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.26 no.11C
• /
• pp.148-156
• /
• 2001

This paper proposed embedded application-specific microprocessor(YS-RDSP) whose structure has an additional DSP processor on chip. The YS-RDSP can execute maximum four instructions in parallel. To make program size shorter, 16-bit and 32-bit instruction lengths are supported in YS-RDSP. The YS-RDSP provides programmability. controllability, DSP processing ability, and includes eight-kilobyte on-chip ROM and eight-kilobyte RAM. System controller on the chip gives three power-down modes for low-power operation, and SLEEP instruction changes operation statue of CPU core and peripherals. YS-RDSP processor was implemented with Verilog HDL on top-down methodology, and it was improved and verified by cycle-based simulator written in C-language. The verified model was synthesized with 0.7um, 3.3V CMOS standard cell library, and the layout size was 10.7mm78.4mm which was implemented by using automatic P&R software.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.23 no.6
• /
• pp.1409-1418
• /
• 1998

The recent audio CODEC(Coding/Decoding) algorithms are complex of several coding techniques, and can be divided into DSP tasks, controller tasks and mixed tasks. The traditional DSP processor has been designed for fast processing of DSP tasks only, but not for controller and mixed tasks. This paper presents a new architecture that achieves high throughput on both controller and mixed tasks of such algorithms while maintaining high performance for DSP tasks. The proposed processor, YSP-3, operates four algorithms while maintaining high performance for DSP tasks. The proposed processor, YSP-3, operates functional units (Multiplier, two ALUs, Load/Store Unit) in parallel via 4-issue super-scalar instruction structure. The performance evaluation of YSP-3 has been done through the implementation of the several DSP algorithms and the part of the AC-3 decoding algorithms.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.2C
• /
• pp.291-297
• /
• 2004

In this paper, a new structure for the AEC(Acoustic Echo Canceller) is proposed in which echo signal components that can be created in mobile communications is effectively eliminated. Block Data Flow Architecture is a parallel architecture that achieves high performance, high efficiency, high throughput, and almost linear speed up. The proposed architecture employs AEC and is implemented using the TMS320C6711 for real-time applications. The proposed AEC shows improved performance by eliminating echoes at 55ms delay path. Since the proposed AEC can also be implemented in Firmware, it is believed to effectively work on various types of echoes if it is applied on CDMA mobile devices. The TMS320C6711 shows much better performance comparing to previous DSPs. For experimental verifications, filtering operation using adaptive algorithm is performed on TMS320C6711 board and error signals resulted from computations are monitored on PC, and then the performance of the implemented AEC is verified through ERLE computation. According the results of simulation, good characteristic of 100dB are shown after 500 sampling data.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.35 no.11B
• /
• pp.1685-1695
• /
• 2010

In this paper, we propose a new reliable multicast MAC protocol over the IEEE 802.11-based tactical ad hoc networks. The major contribution compared to the previous reliable multicast schemes using consecutive CTSs/ACKs is that the proposed scheme can send multiple CTS/ACK messages concurrently assisted by MC-DS/CDMA mechanisms. When multiple receivers receive the RTS/DATA message from a sender, they respond with the CTS/ACK message spread with pre-assigned code in the same time interval. The proposed scheme can reduce the overhead of multiple CTSs/ACKs. It is also possible to alleviate the received signal strength at the enemy detector and thus it improves low probability of detection performance. Through simulations and analysis, the proposed scheme outperforms that of the multiple CTSs/ACks in terms of the throughput, transmission delay and low probability of detection.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.35 no.2A
• /
• pp.112-120
• /
• 2010

In this paper, we propose semi-ML adaptive parallel QRDM (APQRDM) and iterative QRDM (AIQRDM) algorithms based on set grouping. Using the set grouping, the tree-search stage of QRDM algorithm is divided into partial detection phases (PDP). Therefore, when the treesearch stage of QRDM is divided into 4 PDPs, the APQRDM latency is one fourth of that of the QRDM, and the hardware requirements of AIQRDM is approximately one fourth of that of QRDM. Moreover, simulation results show that in $4{\times}4$ system and at Eb/N0 of 12 dB, APQRDM decreases the average computational complexity to approximately 43% of that of the conventional QRDM. Also, at Eb/N0 of 0dB, AIQRDM reduces the computational complexity to about 54% and the average number of metric comparisons to approximately 10% of those required by the conventional QRDM and AQRDM.

• Journal of Energy Engineering
• /
• v.29 no.2
• /
• pp.40-60
• /
• 2020

When various kinds of products are produced from a single energy system, the methodology which allocates the common cost to each product cost is very important because it is directly related with the profit and loss of producer and purchaser. In the cost allocation methodology of electricity and heat for CHP, there are heat method, work method, benefit distribution method, exergy method, and so on. Benefit distribution method is the most widely known worldwide, and exergy method is widely recognized among thermal engineers. As a result of review, it is judged that the rationality of benefit distribution method is low because the result deviates from common sense, and the rationality of exergy method is high because the result consistent with common sense. In accounting, it is calculated as merit methodology and the result is used for negotiations between producer and buyer, but In thermal engineering, the rationality of exergy methodology is described only as a thesis. The purpose of this study is to compare and examine the rationality of merit methodology and exergy methodology, and the aim is to describe in detail in order that producer and buyer can understand the rationality of each methodology.