• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.8
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• pp.1219-1226
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• 2013

This study is the analysis and verification process of the L-band satellite communications repeater thought PCB & circuit EM analysis. System performance can be vulnerable to various spurious inside the L-band satellite transponder, power conversion board, digital signal board, TM/TC board, such as control panels and blocks that are linked signal components when the winch is increased due to the noise component. So the whole system can cause performance degradation. PCB resonance analysis and EM simulation can be easily analyzed for a variety of optimal. Also, by setting the ports on the PCB, H/W designer wants to can easily analyze system.

• Journal of KIISE:Software and Applications
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• v.32 no.12
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• pp.1283-1291
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• 2005

One of the problems in boosting Java performance using a Just-in-Time (JIT) compiler is removing redundant array bound checks. In conventional static compilers, many powerful algorithms have been developed, yet they are not directly applicable to JIT compilation where the compilation time is part of the whole running time. In the current JIT compilers, we tan use either a naive algorithm that is not powerful enough or an aggressive algorithm which requires the transformation into a static single assignment (SSA) form of programs (and back to the original form after optimization), thus causing too much overhead not appropriate for JIT compilation This paper proposes a new algorithm based on an inequality graph which can eliminate array bounds check codes aggressively without resorting to the SSA form. When we actually perform this type of optimization, there are many constraints in code motion caused by the precise exception rule in Java specification, which would cause the algorithm to miss many opportunities for eliminating away bound checks. We also propose a new method to overcome these constraints.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1988.10a
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• pp.73-75
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• 1988

• Proceedings of the Optical Society of Korea Conference
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• 2002.11a
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• pp.92-93
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• 2002

• The Journal of the Acoustical Society of Korea
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• v.21 no.3
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• pp.293-303
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• 2002

This paper implements optimized Time Scale Modification (TSM) system using ITU G.729 speech decoder and Dual SOLA algorithm. The proposed system assume 8 Kz sampling rate, 80 samples/frame input speech from the ITU G.729 speech Decoder and the TSM (Time Scale Modification) feature of Dual SOLA produces the high quality output speech that was slow-down or speed up as a user's choice. Especially, the proposed Optimized Dual SOLA base on various simulations and theoretical analysis, and the additional interpolation procedure of the speech makes it possible to setup high performance integrated TSM system at the maximum time scale modification rate. The system performance is analyzed and verified with various input speech and playback speed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.5
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• pp.1073-1081
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• 2005

This paper describes a 3.3 V 10 bit CMOS digital-to-analog converter with a divided architecture of a 7 MSB and a 3 LSB, which uses an optimal Thermal-to-Binary Decoding method. Most of Dfh converters with hiか speed current drive are an architecture choosing current switch cell, column, row decoding method but this decoding circuit is complicated, occupies a large chip area. For these problems, this paper describes a D/A converter using an optimal Thermal-to-Binary Decoding method. The designed D/A converter with an active chip area of $0.953\;mm^2$ is fabricated by using a 0.35um process. The simulation data shows that the rise/fall time, settling time, and INL/DNL are 1.92/2.1 ns, 12.71 ns, and a less than ${\pm}2.3/{\pm}58$ LSB, respectively. The power dissipation of the D/A converter with a single power supply of 3.3 V is about 224 mW.

• The KIPS Transactions:PartD
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• v.15D no.2
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• pp.197-206
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• 2008

The CTOC framework was implemented to efficiently perform analysis and optimization of the Java bytecode that is often being used lately. In order to analyze and optimize the bytecode from the CTOC, the eCFG was first generated. Due to the bytecode characteristics of difficult analysis, the existing bytecode was expanded to be suitable for control flow analysis, and the control flow graph was drawn. We called eCFG(extended Control Flow Graph). Furthermore, the eCFG was converted into the SSA Form for a static analysis. Many loops were found in the conversion program. The previous CTOC performed conversion directly into the SSA Form without processing the loops. However, processing the loops prior to the SSA Form conversion allows more efficient generation of the SSA Form. This paper examines the process of finding the loops prior to converting the eCFG into the SSA Form in order to efficiently process the loops, and exhibits the procedures for generating the loop tree.

• Journal of the Korea Society of Computer and Information
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• v.13 no.5
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• pp.27-35
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• 2008

The CTOC framework was implemented to efficiently perform analysis and optimization of the Java bytecode that is often being used lately. In order to analyze and optimize the bytecode from the CTOC, the eCFG was first generated. Due to the bytecode characteristics of difficult analysis, the existing bytecode was expanded to be suitable for control flow analysis. and the control flow graph was drawn. We called eCFG(extended Control Flow Graph). Furthermore, the eCFG was converted into the SSA Form for a static analysis. Many loops were found in the conversion program. The previous CTOC performed conversion directly into the SSA Form without processing the loops. However, processing the loops prior to the SSA Form conversion allows more efficient generation of the SSA Form. This paper examines the process of finding the loops prior to converting the eCFG into the SSA Form In order to efficiently process the loops, and exhibits the procedures for generating the loop tree.

• Journal of the Korean Institute of Gas
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• v.26 no.2
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• pp.21-26
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• 2022

Since the four-wheel drive transmits the driving force to all four wheels, the traction with the road surface increases, thereby increasing the driving force. However, it has the disadvantage of lowering fuel efficiency. Therefore, four-wheel drive is commonly used as a method of converting to optional four-wheel drive when necessary while driving in two-wheel drive. This selective four-wheel drive converts the driving force by mechanically changing the electric signal sent by the driver in the transfer case. In this study, in order to mechanically change the electrical signal, a reducer is applied to the motor to increase the torque to perform the function. Therefore, in this study, a reduction mechanism applicable to the motor inside the transfer case applied to convert the drive is derived, and the reduction ratio applying the planetary gear type is optimized accordingly. And based on the derived reduction ratio, two sets of planetary gears using a ring gear in common were applied to develop a planetary gear tooth type in which the input shaft and output shaft are decelerated in the same phase. Optimization design was carried out.

• Journal of KIISE:Databases
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• v.32 no.4
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• pp.345-361
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• 2005

A transform-space index indexes objects represented as points in the transform space An advantage of a transform-space index is that optimization of join algorithms using these indexes becomes relatively simple. However, the disadvantage is that these algorithms cannot be applied to original-space indexes such as the R-tree. As a way of overcoming this disadvantages, the authors earlier proposed the transform-space view join algorithm that joins two original- space indexes in the transform space through the notion of the transform-space view. A transform-space view is a virtual transform-space index that allows us to perform join in the transform space using original-space indexes. In a transform-space view join algorithm, the order of accessing disk pages -for which various space filling curves could be used -makes a significant impact on the performance of joins. In this paper, we Propose a new space filling curve called the adaptive row major order (ARM order). The ARM order adaptively controls the order of accessing pages and significantly reduces the one-pass buffer size (the minimum buffer size required for guaranteeing one disk access per page) and the number of disk accesses for a given buffer size. Through analysis and experiments, we verify the excellence of the ARM order when used with the transform-space view join. The transform-space view join with the ARM order always outperforms existing ones in terms of both measures used: the one-pass buffer size and the number of disk accesses for a given buffer size. Compared to other conventional space filling curves used with the transform-space view join, it reduces the one-pass buffer size by up to 21.3 times and the number of disk accesses by up to $74.6\%$. In addition, compared to existing spatial join algorithms that use R-trees in the original space, it reduces the one-pass buffer size by up to 15.7 times and the number of disk accesses by up to $65.3\%$.