• Title/Summary/Keyword: 버퍼 캐쉬

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Design of File System for small File Management at Real-Time Linux (Real-Time Linux에세 소규모 파일 관리를 위한 파일 시스템의 설계)

  • Choi, Yong-Sik;Lee, Sang-Rak;Shin, Seung-Ho
    • Proceedings of the Korea Information Processing Society Conference
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    • 2002.11b
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    • pp.1635-1638
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    • 2002
  • 리눅스 파일 시스템은 자기식 회전 디스크를 기반으로 개발되어 현재 임베디드 시스템에서 많이 사용되고 있는 플래시 메모리에 적용하기에 많은 문제점이 있다. 본 논문에서는 플래시 메모리의 특성을 고려하여 블록 사이즈를 재조정 함으로써 소규모 파일 시스템 관리에 유용하며 사용 빈도를 나타내는 블록을 추가하여 지움 정책, 파일 시스템 성능 향상을 위한 버퍼 캐쉬 기법에 의한 소규모 파일 시스템 모델을 설계하였다.

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Extension of EXT2 for Single Disk I/O Environment (단일 디스크 입출력 환경을 위한 EXT2의 확장)

  • 임동혁;황인철;변은규;맹승렬
    • Proceedings of the Korean Information Science Society Conference
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    • 2004.10a
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    • pp.76-78
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    • 2004
  • 단일 디스크 입출력 환경은 클러스터 시스템의 분산된 디스크들을 하나의 통합된 디스크의 이미지로 제공하여 사용자에게 편의성을 제공한다. 하지만, 디바이스 수준에서의 서비스를 제공하고 이로 인해 여러 노드에서의 파일의 병렬적인 접근을 지원하기 위해서는 클러스터 파일 시스템의 지원이 요구된다. 본 논문은 리눅스 시스템에서 가장 많이 사용하는 EXT2 파일 시스템을 단일 입출력 환경에서 효과적으로 사용할 수 있는 클러스터 파일 시스템으로의 확장하는 방안에 대해서 설명한다. 기존의 EXT2 파일 시스템을 커널 모듈의 형태로 재구성하고, 버퍼 캐쉬와 메타 데이터의 일관성 유지를 위하여 분산 락 모듈물 구현하고 이를 이용하여 데이터의 일관성과 동기화 문제를 동시에 해결하도록 하여, EXT2 파일 시스템을 클러스터 파일 시스템으로 확장하였다

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A Design of Fractional Motion Estimation Engine with 4×4 Block Unit of Interpolator & SAD Tree for 8K UHD H.264/AVC Encoder (8K UHD(7680×4320) H.264/AVC 부호화기를 위한 4×4블럭단위 보간 필터 및 SAD트리 기반 부화소 움직임 추정 엔진 설계)

  • Lee, Kyung-Ho;Kong, Jin-Hyeung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.6
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    • pp.145-155
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    • 2013
  • In this paper, we proposed a $4{\times}4$ block parallel architecture of interpolation for high-performance H.264/AVC Fractional Motion Estimation in 8K UHD($7680{\times}4320$) video real time processing. To improve throughput, we design $4{\times}4$ block parallel interpolation. For supplying the $10{\times}10$ reference data for interpolation, we design 2D cache buffer which consists of the $10{\times}10$ memory arrays. We minimize redundant storage of the reference pixel by applying the Search Area Stripe Reuse scheme(SASR), and implement high-speed plane interpolator with 3-stage pipeline(Horizontal Vertical 1/2 interpolation, Diagonal 1/2 interpolation, 1/4 interpolation). The proposed architecture was simulated in 0.13um standard cell library. The gate count is 436.5Kgates. The proposed H.264/AVC Fractional Motion Estimation can support 8K UHD at 30 frames per second by running at 187MHz.

A Design of 4×4 Block Parallel Interpolation Motion Compensation Architecture for 4K UHD H.264/AVC Decoder (4K UHD급 H.264/AVC 복호화기를 위한 4×4 블록 병렬 보간 움직임보상기 아키텍처 설계)

  • Lee, Kyung-Ho;Kong, Jin-Hyeung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.5
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    • pp.102-111
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    • 2013
  • In this paper, we proposed a $4{\times}4$ block parallel architecture of interpolation for high-performance H.264/AVC Motion Compensation in 4K UHD($3840{\times}2160$) video real time processing. To improve throughput, we design $4{\times}4$ block parallel interpolation. For supplying the $9{\times}9$ reference data for interpolation, we design 2D cache buffer which consists of the $9{\times}9$ memory arrays. We minimize redundant storage of the reference pixel by applying the Search Area Stripe Reuse scheme(SASR), and implement high-speed plane interpolator with 3-stage pipeline(Horizontal Vertical 1/2 interpolation, Diagonal 1/2 interpolation, 1/4 interpolation). The proposed architecture was simulated in 0.13um standard cell library. The maximum operation frequency is 150MHz. The gate count is 161Kgates. The proposed H.264/AVC Motion Compensation can support 4K UHD at 72 frames per second by running at 150MHz.

Affinity-based Dynamic Transaction Routing in a Shared Disk Cluster (공유 디스크 클러스터에서 친화도 기반 동적 트랜잭션 라우팅)

  • 온경오;조행래
    • Journal of KIISE:Databases
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    • v.30 no.6
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    • pp.629-640
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    • 2003
  • A shared disk (SD) cluster couples multiple nodes for high performance transaction processing, and all the coupled nodes share a common database at the disk level. In the SD cluster, a transaction routing corresponds to select a node for an incoming transaction to be executed. An affinity-based routing can increase local buffer hit ratio of each node by clustering transactions referencing similar data to be executed on the same node. However, the affinity-based routing is very much non-adaptive to the changes in the system load, and thus a specific node will be overloaded if transactions in some class are congested. In this paper, we propose a dynamic transaction routing scheme that can achieve an optimal balance between affinity-based routing and dynamic load balancing of all the nodes in the SD cluster. The proposed scheme is novel in the sense that it can improve the system performance by increasing the local buffer hit ratio and reducing the buffer invalidation overhead.

Multicast VOD System for Interactive Services in the Head-End-Network (Head-End-Network에서 대화형 서비스를 위한 멀티캐스트 VOD 시스템)

  • Kim, Back-Hyun;Hwang, Tae-June;Kim, Ik-Soo
    • The KIPS Transactions:PartB
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    • v.11B no.3
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    • pp.361-368
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    • 2004
  • This paper proposes an interactive VOD system to serve truly interactive VCR services using multicast delivery, client buffer and web-caching technique which implements the distributed proxy in Head-End- Network(HNET). This technique adopts some caches in the HNET that consists of a Switching Agent(SA), some Head-End-Nodes(HEN) and many clients. In this model, HENs distributively store the requested video under the control of SA. Also, client buffer dynamically expands to support various VCR playback rate. Thus, interactive services are offered with transmitting video streams from network, HENs and stored streams on buffer. Therefore this technique makes the load of network occur In the limited area, minimizes the additional channel allocation from server and restricts the transmission of duplicated video contents

Hybrid Value Predictor in Wide-Issue Superscalar Processor (슈퍼스칼라 프로세서에서 명령 윈도우 크기에 따른 혼합형 값 예측기)

  • Jeon, Byoung-Chan;Choi, Gyoo-Seok
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.9 no.2
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    • pp.97-103
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    • 2009
  • In this paper, the performance of a hybrid value predictor according to the instruction fetch rate on window size superscalar processors is evaluated. In general, the data dependency relations of instructions are increased with the number of the fetched instructions. Therefore, it is expected that the performance of a value predictor will be higher when the instruction fetch rate is increased. The performance is studied for the machine with collapsing buffer and he one with trace cache as an instruction fetch mechanism. As a result of experiment, it is showed that the performance effect of a value predictor is higher as the instruction fetch rate of instruction window size, IPC, predict rate on apply with non-tc and tc is increased.

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Performance Improvements of Handover in Mobile-IP Protocol for Mobile Computing (이동 컴퓨팅을 위한 Mobile-IP 프로토콜에서의 핸드오버 성능개선)

  • 박성수;송영재;조동호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.6A
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    • pp.832-844
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    • 1999
  • In this paper, we analyzed mobile-IP protocol of IETF, and propose new method to improve performance in handover environments. In proposed method, cache agent manages mobility binding information for mobile host. Thus, effective support of mobility is possible. Also, when handover occurs, mobile host recognizes change of foreign agent, and transmits registration message to new foreign agent. However, during registration time, data packet loss is occurs in old foreign agent. Thus, we prevent data loss by using data packet buffering and forwarding in old foreign agent.According to simulation results for data packet transmission performance in the case of handover occurring, proposed method has better performance than previous method in the view of transmission delay and throughput. Especially, if handover occurs very often, data buffering and forwarding method in foreign agent could guarantee better performance.

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NVM-based Write Amplification Reduction to Avoid Performance Fluctuation of Flash Storage (플래시 스토리지의 성능 지연 방지를 위한 비휘발성램 기반 쓰기 증폭 감소 기법)

  • Lee, Eunji;Jeong, Minseong;Bahn, Hyokyung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.4
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    • pp.15-20
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    • 2016
  • Write amplification is a critical factor that limits the stable performance of flash-based storage systems. To reduce write amplification, this paper presents a new technique that cooperatively manages data in flash storage and nonvolatile memory (NVM). Our scheme basically considers NVM as the cache of flash storage, but allows the original data in flash storage to be invalidated if there is a cached copy in NVM, which can temporarily serve as the original data. This scheme eliminates the copy-out operation for a substantial number of cached data, thereby enhancing garbage collection efficiency. Experimental results show that the proposed scheme reduces the copy-out overhead of garbage collection by 51.4% and decreases the standard deviation of response time by 35.4% on average.

A Dynamic Transaction Routing Algorithm with Primary Copy Authority (주사본 권한을 이용한 동적 트랜잭션 분배 알고리즘)

  • Kim, Ki-Hyung;Cho, Hang-Rae;Nam, Young-Hwan
    • The KIPS Transactions:PartD
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    • v.10D no.7
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    • pp.1067-1076
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    • 2003
  • Database sharing system (DSS) refers to a system for high performance transaction processing. In DSS, the processing nodes are locally coupled via a high speed network and share a common database at the disk level. Each node has a local memory and a separate copy of operating system. To reduce the number of disk accesses, the node caches database pages in its local memory buffer. In this paper, we propose a dynamic transaction routing algorithm to balance the load of each node in the DSS. The proposed algorithm is novel in the sense that it can support node-specific locality of reference by utilizing the primary copy authority assigned to each node; hence, it can achieve better cache hit ratios and thus fewer disk I/Os. Furthermore, the proposed algorithm avoids a specific node being overloaded by considering the current workload of each node. To evaluate the performance of the proposed algorithm, we develop a simulation model of the DSS, and then analyze the simulation results. The results show that the proposed algorithm outperforms the existing algorithms in the transaction processing rate. Especially the proposed algorithm shows better performance when the number of concurrently executed transactions is high and the data page access patterns of the transactions are not equally distributed.