• Title/Summary/Keyword: 반복적 등화 방법

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An Iterative Two-Dimensional Equalizer for Bit Patterned Media Storage Systems Based on Contraction Mapping (비트 패턴 미디어 저장장치를 위한 축약사상 기반의 반복적 2차원 등화기)

  • Moon, Woosik;Im, Sungbin;Park, Sehwang
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.6
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    • pp.3-8
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    • 2013
  • Bit patterned media (BPM) storage is one of the promising technologies to overcome the limitations of the conventional magnetic recording. However, there are some problems in a high areal density BPM storage, inter-track interference, inter-symbol interference and noise which are severely degrading performance of the system with reducing the bit error rate. In this paper, we present a simple iterative two-dimensional equalizer based on the contraction mapping theorem to mitigate these adverse effects. Furthermore, we examine that the channel characteristics of the proposed two-dimensional equalizer satisfies the convergence conditions. In the simulation we demonstrate the bit separation characteristics of the one-dimensional equalizer and the two-dimensional equalizer and evaluate the BER performance of the proposed equalizer comparing with the conventional equalizers. According to the results of experiments, the proposed equalizer is an promising equalizer with maintaining proper complexity for a high areal density BPM storage.

FFT-Based Block Least Mean Squares Adaptive Equalizer using Antenna Arrays for High Speed Wireless Communications. (안테나 배열을 이용한 FFT-Block LMS 방식의 적응형 등화기)

  • 류원형;오성근
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.167-170
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    • 1998
  • 본 논문에서는 주파수 영역에서 구현되는 안테나 배열을 이용한 적응형 등화기의 구조를 제안하였다. 제안된 방식은 주파수 영역에서 블록 LMS (least mean squares) 방식을 사용하기 때문에 수렴 속도가 빠르고 계산량이 적다. 또한 안테나 배열을 사용함으로서 다중경로 환경에서 한 개의 안테나를 사용한 경우에 비해 특히 우수한 성능을 지닌다. 다중 경로를 통한 신호들을 분리하기 위해 학습신호를 사용하여 반복적으로 출력신호와의 오차를 최소화하는 방법을 사용하였다. 시뮬레이션을 통하여 안테나의 개수, 신호의 입사각, 세기 등에 따른 성능을 분석하고, 제안된 방식이 다이버시티 시스템에 사용되는 경우에 대하여도 성능을 분석하였다.

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Estimation of Zero-Error Probability of Constant Modulus Errors for Blind Equalization (블라인드 등화를 위한 상수 모듈러스 오차의 영-확률 추정 방법)

  • Kim, Namyong
    • Journal of Internet Computing and Services
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    • v.15 no.5
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    • pp.17-24
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    • 2014
  • Blind algorithms designed to maximize the probability that constant modulus errors become zero carry out some summation operations for a set of constant modulus errors at an iteration time inducing heavy complexity. For the purpose of reducing this computational burden induced from the summation, a new approach to the estimation of the zero-error probability (ZEP) of constant modulus errors (CME) and its gradient is proposed in this paper. The ZEP of CME at the next iteration time is shown to be calculated recursively based on the currently calculated ZEP of CME. It also is shown that the gradient for the weight update of the algorithm can be obtained by differentiating the ZEP of CME estimated recursively. From the simulation results that the proposed estimation method of ZEP-CME and its gradient produces exactly the same estimation results with a significantly reduced computational complexity as the block-processing method does.

Design and Performance Evaluation of Improved Turbo Equalizer (개선된 터보 등화기의 설계와 성능 평가)

  • An, Changyoung;Ryu, Heung-Gyoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.8
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    • pp.28-38
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    • 2013
  • In this paper, we propose a improved turbo equalizer which generates a feedback signal through a simple calculation to improve performance in single carrier system with the LMS(least mean square) algorithm based equalizer and LDPC(low density parity check) codes. LDPC codes can approach the Shannon limit performance closely. However, computational complexity of LDPC codes is greatly increased by increasing the repetition of the LDPC codes and using a long parity check matrix in harsh environments. Turbo equalization based on LDPC code is used for improvement of system performance. In this system, there is a disadvantage of very large amount of computation due to the increase of the repetition number. To less down the amount of this complicated calculation, The proposed improved turbo equalizer adjusts the adoptive equalizer after the soft decision and the LDPC code. Through the simulation results, it's confirmed that performance of improved turbo equalizer is close to the SISO-MMSE(soft input soft output minimum mean square error) turbo equalizer based on LDPC code with the smaller amount of calculation.

Implementation of a PRML Detection for Asymmetric High-density Optical Storage System (고밀도 비선형 광 저장장치를 위한 새로운 부분응답 최대유사도 신호 검출기 구현)

  • Lee, Kyu-Suk;Lee, Jae-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.11C
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    • pp.1052-1057
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    • 2006
  • The implement the adaptive partial response maximum likelihood (PRML) detector with tilt analyzer for asymmetric high-density optical storage system. For the estimation of disc tilt, we exploit spc patterns in each data frame. Because of using the ROM table to renew the coefficients of equalizer and reference values of branches, the complexity of the hardware is reduced. The proposed PRML has been designed and verified by VerilogHDL and synthesized by the Synopsys Design Compiler with Hynix $0.35{\mu}m$ STD cell library. In the result, the total gate count is 35K, and the maximum operating frequency is 140MHz.

PRML Detection for Asymmetric High-density Optical Storage System (고밀도 비선형 광 저장장치를 위한 새로운 부분응답 최대유사도 신호 검출 기술)

  • Lee, Kyu-Suk;Lee, Jae-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.10C
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    • pp.927-932
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    • 2006
  • We Propose a partial response maximum likelihood(PRML) detection method that improves the performance of the high-density optical storage system. It concurrently adjusts the coefficient of equalizer and reference values of branches in Viterbi detector. For the estimation of asymmetric channel characteristics by the tangential tilt, we exploit sync patterns in each data frame. The simulation result shows it improves the Performance up to 4dB at 10-6 BER compared to conventional adaptive PRML.

An Efficient FTN Decoding Method using Separation of LDPC Decoding Symbol in Next Generation Satellite Broadcasting System (차세대 위성 방송 시스템에서 LDPC 복호 신호 분리를 통한 효율적인 FTN 복호 방법)

  • Sung, Hahyun;Jung, Jiwon
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.2
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    • pp.63-70
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    • 2016
  • To increase throughput efficiency and improve performance, FTN(Faster Than Nyquist) method and LDPC(Low Density Parity Code) codes are employed in DVB-S3 system. In this paper, we proposed efficient turbo equalization model to minimize inter symbol interference induced by FTN transmission. This paper introduces two conventional scheme employing SIC(Successive Interference Cancellation) and BCJR equalizer. Then, we proposed new scheme to resolve problems in this two conventional scheme. To make performance improved in turbo equalization model, the outputs of LDPC and BCJR equalizer are iteratively exchange probabilistic information. In fed LDPC outputs as extrinsic informa tion of BCJR equalizer. we split LDPC output to separate bit probabilities. We compare performance of proposed scheme to that of conventional methods through using simulation in AWGN(Additive White Gaussian Noise) channel. We confirmed that performance was improved compared to conventional methods as increasing throughput parameters of FTN.

Effective Self-Interference Cancellation for SSD(Simultaneous Single Band Duplex) System (SSD(Simultaneous Single Band Duplex) 시스템을 위한 효과적인 자기 간섭 제거 방법)

  • An, Changyoung;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.25 no.2
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    • pp.189-198
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    • 2014
  • In this paper, we propose a SSD(Simultaneous Single band Duplex) system using turbo equalizer with frame structure for simultaneous full-duplex communication in single band. the proposed system uses frame structure for self-interference cancellation effectively. In this paper, performance of the proposed system with frame structure compares to performance of SSD system without frame structure to analysis performance of the proposed system with frame structure. Simulation results show that the performance of proposed system with frame structure is batter than performance of SSD system without frame structure when the number of global iterations of both system is same. Using proposed system with frame structure, we can verify that the performance like SSD system without frame structure by few global iteration of turbo equalizer.

Signal Detection for 8 PSK and 16 QAM in EST-Based Modulation (EST기반 변조에서 8 PSK와 16 QAM 에 대한 신호 검출)

  • Kwon, Byung-Uk;Hwang, Tea-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.11C
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    • pp.682-693
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    • 2011
  • Energy spreading transform (EST) based modulation is an effective technique to combat frequency-selective fading in broadband wireless communication. It performs close to the inter-symbol interference (ISI)-free matched filter bound (MFB) only at the complexity of a linear detector. Originally, EST-based modulation has been proposed for QPSK. However, to fully utilize the capacity of multipath fading channels, higher-order modulations are also necessary. In this paper, we review the EST based modulation that has originally been proposed for QPSK and discuss its extension to 8 PSK and 16 QAM. The performance of the extended system is verified through simulation in Proakis B and 8-tap fading channel. The EST based modulation for 8 PSK shows the performance which is very close to MFB and the EST based modulation for 16 QAM shows the performance gap between its receiver and MFB.

Trace-Back Viterbi Decoder with Sequential State Transition Control (순서적 역방향 상태천이 제어에 의한 역추적 비터비 디코더)

  • 정차근
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.40 no.11
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    • pp.51-62
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    • 2003
  • This paper presents a novel survivor memeory management and decoding techniques with sequential backward state transition control in the trace back Viterbi decoder. The Viterbi algorithm is an maximum likelihood decoding scheme to estimate the likelihood of encoder state for channel error detection and correction. This scheme is applied to a broad range of digital communication such as intersymbol interference removing and channel equalization. In order to achieve the area-efficiency VLSI chip design with high throughput in the Viterbi decoder in which recursive operation is implied, more research is required to obtain a simple systematic parallel ACS architecture and surviver memory management. As a method of solution to the problem, this paper addresses a progressive decoding algorithm with sequential backward state transition control in the trace back Viterbi decoder. Compared to the conventional trace back decoding techniques, the required total memory can be greatly reduced in the proposed method. Furthermore, the proposed method can be implemented with a simple pipelined structure with systolic array type architecture. The implementation of the peripheral logic circuit for the control of memory access is not required, and memory access bandwidth can be reduced Therefore, the proposed method has characteristics of high area-efficiency and low power consumption with high throughput. Finally, the examples of decoding results for the received data with channel noise and application result are provided to evaluate the efficiency of the proposed method.