• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.11 s.353
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• pp.8-15
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• 2006

In this paper, we propose the iterative receiver for LDPC-coded OFDMA systems in uplink environments. Applying the Wiener filtering to pilot symbols, an initial channel estimation can be performed effectively. To reduce the complexity of the Wiener filtering, we approximate Wiener filtering coefficients to pre-determined coefficients according to estimated correlation of channel. After an LDPC decoding process, soft symbol derived by extrinsic information of decoder outputs is used to estimate channel. we also derive the error variance of channel estimation and maximum ratio combined results. Using combined results, the channel correlation is re-estimated. Then the proper Wiener filtering coefficients are chosen according to the re-estimated result of the channel correction. Using a computer simulation, we show that the proposed receiver structure has the better performance than the receiver using only pilot symbols.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.9
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• pp.1892-1897
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• 2012

In this paper, efficient CNU(Check Node Update) algorithms are analyzed for high speed LDPC decoding in DVB-S2 standard. In aspect to CNU methods, there are some kinds of CNU methods. Among of them, MP (Min Product) method is quite often used in LDPC decoding. However MP needs LUT (Look Up Table) that is critical path in LDPC decoding speed. A new SC-NMS (Self-Corrected Normalized Min-Sum) method is proposed in the paper. NMS needs only normalized scaling factor instead of LUT and compensates the overestimation of MP approximation. In addition, SC method is proposed. It gives a faster convergence toward a decoded codeword. If a message change its sign between two iterations, it is not reliable and to avoid to propagate noisy information, its module is set to 0. The performance of SC-NMS has a little degrade compare to MP by 0.1 dB, however considering computational complexity and decoding speed, SC-NMS algorithm is optimal method for CNU algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37A no.11
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• pp.972-978
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• 2012

LDPC (low density parity check) code shows near Shannon limit performance by iterative decoding based on sum-product algorithm (SPA). Message updating procedure between variable and check nodes in SPA is done by a scheduling method. LDPC code shows different performance according to scheduling schemes. The conventional researches have been shown that the shuffled BP (belief propagation) algorithm shows better performance than the standard BP algorithm although it needs less number of iterations. However the reason is not analyzed clearly. Therefore the reason of difference in performance according to LDPC decoding algorithms is analyzed in this paper. 4 cases according to satisfaction of parity check condition are considered and compared. As results, the difference in the updating procedure in a cycle in the parity check matrix is considered to be the main reason of performance difference.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.11 no.5
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• pp.185-192
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• 2011

In this paper, we simulate and analyze performance of iterative coding scheme, double binary turbo code, for high speed power line communication (PLC) systems. PLC system has hostile environment for high speed data transmission, so error correction method is necessary to compensate effects of PLC channel. We employ the PLC model proposed by M. Zimmerman and Middleton Class A interference model, and system performance is evaluated in terms of bit error rate (BER). From the simulation results, we confirm double binary turbo code provides considerable coding gains to PLC system and BER performance is significantly improved as the number of iteration increase. It is also confirmed that BER performance increases as code rate is lager, while it decreases as the code rate is smaller.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.6A
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• pp.537-543
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• 2007

In this paper, we propose a new stopping criterion for the turbo processing (Turbo-BLAST) of MIMO-OFDM system. To reduce the high computational complexity of turbo-BLAST, it is desirable to lessen the outer-loop iteration number. In a system such as IEEE 802.16e Mobile WiMax, no CRC bits are available except the last encoding packet of a transmitted burst, so early stopping criteria without the help of CRC bits are needed. The proposed criterion counts the sign differences between received parity bits and the re-encoded parity bits from received information bits. With the tail-biting code which is accepted for IEEE 802.16e, a method that the re-encoder operates at half complexity is also proposed. Computer simulations show that the proposed stopping criterion approaches the performance of GENIE aided criterion with less average number of iterations than the other early stopping criteria.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.12
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• pp.1956-1969
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• 1993

The tilted Huffman trees are used in JPEG and MPEG image compression standards for Huffman coding. In this paper we propose a new decoding technique for Huffman code, symbols are decoded by repeatedly obtaining the predefined number of consecutive bits and accessing symbol tables based on the obtaining bits. We show that the size of the symbol table can be small if the Huffman tree is tilted. Specifically, we show an upper bound on the size in this paper. Since the proposed method processes multiple bits at each clock, it can be used for real time processing. We show such evaluation results.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.12
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• pp.36-41
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• 2016

LDPC code has beend applied in recent communication standards, such as Wi-Fi, WiGig, 10GBased-T Ethernet as a forward error correction code. However, LDPC code is required a large amount of computational complexity due to large iterations and block lengths for high performances. To solve this problem, various research has been continously performed for reducing computational complexity. In this paper, we propose AFC algorithm to deactive the variable and check node for reduce the computational complexity.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.6
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• pp.17-21
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• 2017

Since holographic data storage has the advantage of high recording density and data transfer rate, it is a candidate for the next generation storage systems. However, Holographic data storage system is affected by interpage interference and two dimensional intersymbol interference. Also, burst error occurs by physical impact. In this paper, we propose an LDPC product code using modified log-likelihood ratio and extrinsic information to correct burst error and improve performance of holographic data storage. The performance of proposed LDPC product code is 0.5dB better than that of the conventional LDPC code.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.2C
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• pp.25-30
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• 2005

Turbo code is popularly used for the reliable communication in the presence of burst errors. Even if it shows good error performance near to the Shannon limits, it requires a large amount of memories and exhibits long latency. This paper proposes an architecture for the low power implementation of the Turbo decoder adopting the Max-Log-Map algorithm. In the proposed design, two SISO decoders are designed to operate in parallel, and a novel interleaver is designed to prevent the collision of memory accesses by two SISO decoders. Experimental results show that power consumption has been reduced by about 40% in the proposed decoder compared to previous Turbo decoders. The area overhead due to the additional interleaver controller is negligible.

• Journal of Satellite, Information and Communications
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• v.6 no.2
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• pp.78-83
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• 2011

In this paper, we propose a computationally efficient early stopping method to reduce the average number of iterations. The conventional early stopping methods have too much computational complexity to compute the stopping criterion. Thus, only the hard decision based early stopping method is suitable to realize the hardware of LDPC decoder. However, this method also can increase the computational complexity of LDPC decoder. The proposed method can effectively reduce the computational complexity of stopping criterion as we do not compute hard decision, and we combine the stopping criterion with horizontal shuffling scheduling decoding scheme. The simulation results show that a new early stopping method achieves acceptable bit error rate performance also reduces the average number of iterations.