• Title/Summary/Keyword: 반도체 소자

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Selective Contact Hole Filling by Electroless Ni Plating (무전해Ni도금에 의한 선택적 CONTACT HOLE 충진)

  • 김영기;우찬희;박종완;이원해
    • Proceedings of the Materials Research Society of Korea Conference
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    • 1992.05b
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    • pp.26-27
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    • 1992
  • The effect of activation and electroless nickel plating conditions on contact properties were investigated for selective electroless nickel plating of Si farers in order to obtain an optimum condition of contact hole filling. According to RCA prosess, p-type si 1 icon (100) surface was cleaned out and activated. The effects of temperture, DMAB concentration, time, and stirring iwere investigated for activation of p-type Si(100) surface. The optimal activation condition obtained was 0.5M HF, 1mM PdCl$_2$, 2mM EDTA, 7$0^{\circ}C$, 90sec under ultrasonic vibration. In electroless nickel plating, the effect of temperature, DMAB concentration, pH, and plating ti me were studied. The optimal plating condition found was 0. 10M NiS0$_4$.$H_2O$, 0.lIM Citrate, pH 6.8, 6$0^{\circ}C$, 30 minutes. The contact resistence of fi]ms wascomparatively low. It took 30 minutes to obtain 1$\mu$m thick film with 8$\mu$M DMAB concentration. The film surface roughness was improved with increasing temperature and decreasing pH of the plating solution. The best quality of the film was obtained with the condition of temperature 6$0^{\circ}C$ and pH 6.8. The micro-victors hardness of film was about 600Hv and was decreased wi th increasing particle size of plating layer.

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Microstructure and Magnetic Properties of Zn1-xCoxO Film Prepared by Pulsed DC Magnetron Sputtering (펄스 DC 마그네트론 스퍼터링법에 의한 Zn1-xCoxO 박막의 미세조직 및 자기적 특성)

  • Ko, Yoon-Duk;Ko, Seok-Bae;Choi, Moon-Soon;Tai, Weon-Pil;Kim, Ki-Chul;Kim, Jong-Min;Soh, Su-Jeung;Kim, Young-Sung
    • Journal of the Korean Ceramic Society
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    • v.42 no.3 s.274
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    • pp.211-217
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    • 2005
  • [ $Zn_{1-x}Co_{x}O$ (x=0-0.3) films were grown on Corning 7059 glasses by asymmetrical bipolar pulsed dc magnetron sputtering. The c-axis orientation along (002) plane was enhanced with increasing Co concentration. The $Zn_{1-x}Co_{x}O$ films are grown with fibrous grains of tight dome shape. The transmittance spectra measured from UV-visible showed that sp-d exchange interactions and typical d-d transitions become activated with increasing Co concentration. The electrical resistivity of $Zn_{1-x}Co_{x}O$ films increased with increasing Co concentration, especially it increased greatly at $30at\% Co. X-ray photoelectron spectroscopy and alternating gradient magnetometer analyses indicated that no Co metal cluster is formed and the ferromagnetic properties are exhibited. The low electrical resistivity and room temperature ferromagnetism of $Zn_{1-x}Co_{x}O$ thin films suggested the possibility of the application to Diluted Magnetic Semiconductors (DMSs).

The properties of AlGaN epi layer grown by HVPE (HVPE에 의해 성장된 AlGaN epi layer의 특성)

  • Jung, Se-Gyo;Jeon, Hun-Soo;Lee, Gang-Seok;Bae, Seon-Min;Yun, Wi-Il;Kim, Kyoung-Hwa;Yi, Sam-Nyung;Yang, Min;Ahn, Hyung-Soo;Kim, Suck-Whan;Yu, Young-Moon;Cheon, Seong-Hak;Ha, Hong-Ju
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.22 no.1
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    • pp.11-14
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    • 2012
  • The AlGaN layer has direct wide bandgaps ranging from 3.4 to 6.2 eV. Nowadays, it is becoming more important to fabricate optical devices in an UV region for the many applications. The high quality AlGaN layer is necessary to establish the UV optical devices. However, the growth of AlGaN layer on GaN layer is difficult due to the lattice mismatch and difference thermal expansion coefficient between GaN layer and AlGaN layer. In this paper, we attempted to grow the LED structure on GaN template by mixed-source HVPE method with multi-sliding boat system. We tried to find the optical and lattice transition of active layer by control the Al content in mixed-source. For the growth of epi layer, the HCl and $NH_3$ gas were flowed over the mixed-source and the carrier gas was $N_2$. The temperature of source zone and growth zone was stabled at 900 and $1090^{\circ}C$, respectively. After the growth, we performed the x-ray diffraction (XRD) and electro luminescence (EL) measurement.

A Printing Process for Source/Drain Electrodes of OTFT Array by using Surface Energy Difference of PVP (Poly 4-vinylphenol) Gate Dielectric (PVP(Poly 4-vinylphenol) 게이트 유전체의 표면에너지 차이를 이용한 유기박막트랜지스터 어레이의 소스/드레인 전극 인쇄공정)

  • Choi, Jae-Cheol;Song, Chung-Kun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.3
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    • pp.7-11
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    • 2011
  • In this paper, we proposed a simple and high-yield printing process for source and drain electrodes of organic thin film transistor (OTFT). The surface energy of PVP (poly 4-vinylphenol) gate dielectric was decreased from 56 $mJ/m^2$ to 45 $mJ/m^2$ by adding fluoride of 3000ppm into it. Meanwhile the surface energy of source and drain (S/D) electrodes area on the PVP was increased to 87 $mJ/m^2$ by treating the areas, which was patterned by photolithography, with oxygen plasma, maximizing the surface energy difference from the other areas. A conductive polymer, G-PEDOT:PSS, was deposited on the S/D electrode areas by brushing painting process. With such a simple process we could obtain a high yield of above 90 % in $16{\times}16$ arrays of OTFTs. The performance of OTFTs with the fluoride-added PVP was similar to that of OTFTs with the ordinary PVP without fluoride, generating the mobility of 0.1 $cm^2/V.sec$, which was sufficient enough to drive electrophoretic display (EPD) sheet. The EPD panel employing the OTFT-backpane successfully demonstrated to display some patterns on it.

Property of Composite Titanium Silicides on Amorphous and Crystalline Silicon Substrates (아몰퍼스실리콘의 결정화에 따른 복합티타늄실리사이드의 물성변화)

  • Song Oh-Sung;Kim Sang-Yeob
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.1 s.38
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    • pp.1-5
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    • 2006
  • We prepared 80 nm-thick TiSix on each 70 nm-thick amorphous silicon and polysilicon substrate using an RF sputtering with $TiSi_2$ target. TiSix composite silicide layers were stabilized by rapid thermal annealing(RTA) of $800^{\circ}C$ for 20 seconds. Line width of $0.5{\mu}m$ patterns were embodied by photolithography and dry etching process, then each additional annealing process at $750^{\circ}C\;and\;850^{\circ}C$ for 3 hours was executed. We investigated the change of sheet resistance with a four-point probe, and cross sectional microstructure with a field emission scanning electron microscope(FE-SEM) and transmission electron microscope(TEM), respectively. We observe an abrupt change of resistivity and voids at the silicide surface due to interdiffusion of silicide and composite titanium silicide in the amorphous substrates with additional $850^{\circ}C$ annealing. Our result implies that the electrical resistance of composite titanium silicide may be tunned by employing appropriate substrates and annealing condition.

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Study on Improvement of Signal to Noise Ratio for HgI2 Radiation Conversion Sensor Using Blocking Layer (Blocking layer 적용을 통한 HgI2 방사선 변환센서의 신호대 잡음비 향상에 관한 연구)

  • Park, Ji-Koon;Yoon, In-Chan;Choi, Su-Rim;Yoon, Ju-Sun;Lee, Young-Kyu;Kang, Sang-Sik
    • Journal of the Korean Society of Radiology
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    • v.5 no.2
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    • pp.97-101
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    • 2011
  • In this study, the basic research verifying possibility of applications as radiology image sensor in Digital Radiography was performed, the radiology image sensor was fabricated using double layer technique tio decrease dark current. High efficiency material in substitution for a-Se have been studied as a direct method of imaging detector in Digital Radiography to decrease dark current by using Hetero junction already used as solar cell, semiconductor. Particle-In-Binder method is used to fabricate radiology image sensor because it has a lot of advantages such as fabrication convenient, high yield, suitability for large area sensor. But high leakage current is one of main problem in PIB method. To make up for the weak points, double layer technique is used, and it is considered that high efficient digital radiation sensor can be fabricated with easy and convenient process. In this study, electrical properties such as leakage current, sensitivity is measured to evaluate double layer radiation sensor material.

Interfacial reaction and Fermi level movements of p-type GaN covered by thin Pd/Ni and Ni/Pd films

  • 김종호;김종훈;강희재;김차연;임철준;서재명
    • Proceedings of the Korean Vacuum Society Conference
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    • 1999.07a
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    • pp.115-115
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    • 1999
  • GaN는 직접천이형 wide band gap(3.4eV) 반도체로서 청색/자외선 발광소자 및 고출력 전자장비등에의 응용성 때문에 폭넓게 연구되고 있다. 이러한 넓은 분야의 응용을 위해서는 열 적으로 안정된 Ohmic contact을 반드시 실현되어야 한다. n-type GaN의 경우에는 GaN계면에서의 N vacancy가 n-type carrier로 작용하기 때문에 Ti, Al, 같은 금속을 접합하여 nitride를 형성함에 의해서 낮은 접촉저항을 갖는 Ohmic contact을 하기가 쉽다. 그러나 p-type의 경우에는 일 함수가 크고 n-type와 다르게 nitride가 형성되지 않는 금속이 Ohmic contact을 할 가능성이 많다. 시료는 HF(HF:H2O=1:1)에서 10분간 초음파 세척을 한 후 깨끗한 물에 충분히 헹구었다. 그런 후에 고순도 Ar 가스로 건조시켰다. Pd와 Ni은 열적 증착법(thermal evaporation)을 사용하여 p-GaN에 상온에서 증착하였다. 현 연구에서는 열처리에 의한 Pd의 clustering을 줄이기 위해서 wetting이 좋은 Ni을 Pd 증착 전과 후에 삽입하였으며, monchromatic XPS(x-ray photoelectron spectroscopy) 와 SAM(scanning Auger microscopy)을 사용하여 열처리 전과 40$0^{\circ}C$, 52$0^{\circ}C$ 그리고 695$0^{\circ}C$에서 3분간 열처리 후의 온도에 따른 morphology 변화, 계면반응(interfacial reaction) 및 벤드 휨(band bending)을 비교 연구하였다. Nls core level peak를 사용한 band bending에서 Schottky barrier height는 Pd/Ni bi-layer 접합시 2.1eV를, Ni/Pd bi-layer의 경우에 2.01eV를 얻었으며, 이는 Pd와 Ni의 이상적인 Schottky barrier height 값 2.38eV, 2.35eV와 비교해 볼 때 매우 유사한 값임을 알 수 있다. 시료를 후열처리함에 의해 52$0^{\circ}C$까지는 barrier height는 큰 변화가 없으나, $650^{\circ}C$에서 3분 열처리 후에 0.36eV, 0.28eV 만큼 band가 더 ?을 알 수 있었다. Pd/Ni 및 Ni/Pd 접합시 $650^{\circ}C$까지 후 열 처리 과정에서 계면에서 matallic Ga은 온도에 비례하여 많은 양이 형성되어 표면으로 편석(segregation)되어지나, In-situ SAM을 이용한 depth profile을 통해서 Ni/Pd, Pd/Ni는 증착시 uniform하게 성장함을 알 수 있었으며, 후열처리 함에 의해서 점차적으로 morphology 의 변화가 일어나기 시작함을 볼 수 있었다. 이는 $650^{\circ}C$에서 열처리 한후의 ex-situ AFM을 통해서 재확인 할 수 있었다. 이상의 결과로부터 GaN에 Pd를 접합 시 심한 clustering이 형성되어 Ohoic contact에 문제가 있으나 Pd/Ni 혹은 Ni/Pd bi-layer를 사용함에 의해서 clustering의 크기를 줄일 수 있었다. Clustering의 크기는 Ni/Pd bi-layer의 경우가 작았으며, $650^{\circ}C$ 열처리 후에 barrier height는 Pd/Ni bi-layer의 경우에도 Ni의 영향을 받음을 알 수 있었다.

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A Study of Soluble Pentacene Thin Film for Organic Thin Film Transistor (유기박막트랜지스터 적용을 위한 Soluble Pentacene 박막의 특성연구)

  • Gong, Su-Cheol;Lim, Hun-Seong;Shin, Ik-Sub;Park, Hyung-Ho;Jeon, Hyeong-Tag;Chang, Young-Chul;Chang, Ho-Jung
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.3
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    • pp.1-6
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    • 2007
  • In this study, the pentacene thin films were prepared by the soluble process, and characterized fur the application of the organic thin film transistor(OTFT) device. To dissolve the pentacene material, two kinds of solvents such as toluene and chloroform were used, and the effects of these solvents on the properties of pentacene thin films coated on ITO/Glass substrate were investigated. Pentacene thin films were prepared by using spin-coating methode and characterized the surface morphology, crystalline and electrical properties. From the AFM measurement, the surface morphology of the pentacene film dissolved with chloroform was improved compared with the one dissolved with toluene solvent. XRD measurement showed that all prepared pentacene film samples were amorphous crystal phases without crystallization of the films. The electrical properties of the pentacene film dissolved with chloroform showed better results than the ones using toluene solvent by hall measurement system. The carrier concentration and the mobility values of pentacene films using chloroform solvent were found to be $-3.225{\times}10^{14}\;cm^{-3}$ and $3.5{\times}10^{-1}\;cm^2{\cdot}V^{-1}{\cdot}S^[-1}$, respectively. The resistivity was about $2.5{\times}10^2\;{\Omega}{\cdot}cm$.

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CUDA-based Parallel Bi-Conjugate Gradient Matrix Solver for BioFET Simulation (BioFET 시뮬레이션을 위한 CUDA 기반 병렬 Bi-CG 행렬 해법)

  • Park, Tae-Jung;Woo, Jun-Myung;Kim, Chang-Hun
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.48 no.1
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    • pp.90-100
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    • 2011
  • We present a parallel bi-conjugate gradient (Bi-CG) matrix solver for large scale Bio-FET simulations based on recent graphics processing units (GPUs) which can realize a large-scale parallel processing with very low cost. The proposed method is focused on solving the Poisson equation in a parallel way, which requires massive computational resources in not only semiconductor simulation, but also other various fields including computational fluid dynamics and heat transfer simulations. As a result, our solver is around 30 times faster than those with traditional methods based on single core CPU systems in solving the Possion equation in a 3D FDM (Finite Difference Method) scheme. The proposed method is implemented and tested based on NVIDIA's CUDA (Compute Unified Device Architecture) environment which enables general purpose parallel processing in GPUs. Unlike other similar GPU-based approaches which apply usually 32-bit single-precision floating point arithmetics, we use 64-bit double-precision operations for better convergence. Applications on the CUDA platform are rather easy to implement but very hard to get optimized performances. In this regard, we also discuss the optimization strategy of the proposed method.

Input and Output Characteristics of Input Current Controlled Inverter Arc Welding Machine with High Efficiency (입력전류 제어형 고효율 인버터아크용접시스템의 입력 및 출력 특성연구)

  • 최규하
    • The Transactions of the Korean Institute of Power Electronics
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    • v.5 no.4
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    • pp.358-369
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    • 2000
  • Shielded metal arc welding machines with AC transformer have been widely used for thin-plate welding applications. Because of being bulky, heavy and of tap-changing property, so the SMAW's are changing to new power electronic circuits such as inverter circuit in order to reduce the system size and also to improve the welding performances at input output sides. The PWM inverter arc welding machine with diode rectifier has better output welding performances but it is has the plentiful harmonics and the lower input power factor. To solve these problems, input current-controlled scheme is considered for PWM inverter arc welding system, and then total input power factor is maintained to be more than 99%. Also a new combined control is proposed which can control both instantaeous welding output voltage and current under constant power condition, and as a result the variations of instantaneous current and voltage can be reduced to very narrow range in the V-I curve relationship, and hence the variance of welding current and voltage become so reduced. In addition the spatter generated during welding process is greatly reduced up to 70%. And the overall effiency can be improved up to 10%, which becomes higher when the load is lower.

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