• Title/Summary/Keyword: 반도체패키지

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Moisture Gettering by Porous Alumina Films on Textured Silicon Wafer (실리콘 표면에 증착된 다공성 알루미나의 수분 흡착 거동)

  • Lim, Hyo Ryoung;Eom, Nu Si A;Cho, Jeong-Ho;Choa, Yong-Ho
    • Korean Chemical Engineering Research
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    • v.53 no.3
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    • pp.401-406
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    • 2015
  • Getter is a class of materials used in absorbing gases such as hydrogen and moisture in microelectronics or semiconductor devices to operate properly. In this study, we developed a new device structure consisting of porous anodized alumina films on textured silicon wafer, which have cost efficiency in materials and processing aspects. Anodic aluminum oxide (AAO) with controlled pore sizes can be applied to a high-efficiency moisture absorber due to the high surface area and OH- saturated surface property. The moisture sorption capacity was 2.02% (RH=35%), obtained by analyzing isothermal adsorption/desorption curve.

Analysis of the Effect of the Substrate Removal and Chip-Mount Type on Light Output Characteristics in InGaN/Sapphire LEDs (InGaN/Sapphire LED에서 기판 제거 유무와 칩 마운트 타입이 광출력 특성에 미치는 영향)

  • Hong, Dae-Woon;Yoo, Jae-Keun;Kim, Jong-Man;Yoon, Myeong-Jung;Lee, Song-Jae
    • Korean Journal of Optics and Photonics
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    • v.19 no.5
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    • pp.381-385
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    • 2008
  • We have analyzed the effect of the substrate removal and packaging schemes on light output characteristics in InGaN/Sapphire LEDs. The removal of the sapphire substrate helps to dissipate the heat generated in the junction, but the advantage comes only with the detrimental effect of degrading the photon extraction efficiency. If the substrate-removed chip is attached to a metallic mount with good thermal conductivity, the maximum driving current is increased drastically, producing significantly increased light output and therefore compensating the photon extraction efficiency degradation. On a dielectric mount with a relatively poor thermal conductivity, however, it produces smaller light output, over most input current range, than the regular type of chips with the sapphire substrate remaining. Thus, for low power applications, the regular chips may be preferred over the substrate-removed chips, regardless of the chip mounts employed.

FPGA Implementation of VME System Controller (VME 시스템 제어기의 FPGA 구현)

  • Bae, Sang-Hyun;Lee, Kang-Hyeon
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.11
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    • pp.2914-2922
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    • 1997
  • For FA (factory automation) and ATE (automatic test equipment) in the industrial area, the standard bus needs to increase the system performance of multiprocessor environment. VME(versa module european package format) bus is appropriated to the standard bus but has features of small package and low board density. Beside, the density of board and semiconductor have grown to become significant issues that affect development time, project cost and field diagnostics. To fit this trend, in this paper, we composed Revision C.1 (IEEE std. P1014-1987) of the integrated environment for the main function such as arbitration, interrupt and interface between, VMEbus and several control modules Also the designed, VME system controller is implemented on FPGA that can be located even into slot 1. The control and function modules are coded with VHDL mid-fixed description method and then those operations are verified by simulation. As a result of experiment, we confirmed the most important that is the operation of Bus timer about Bus error signal should occur within $56{\mu}m$, and both control and function modules have the reciprocal operation correctly. Thus, the constructed VHDL library will be able to apply the system based VMEbus and ASIC design.

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Improving the Sensitivity of an Ultraviolet Optical Sensor Based on a Fiber Bragg Grating by Coating With a Photoresponsive Material (광반응 재료가 코팅된 단주기 광섬유격자 기반 자외선센서의 광민감도 향상 연구)

  • Kim, Woo Young;Kim, Chan-Young;Kim, Hyun-Kyoung;Ahn, Tae-Jung
    • Korean Journal of Optics and Photonics
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    • v.26 no.2
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    • pp.83-87
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    • 2015
  • This study was focused on developing an optical sensor that monitors ultraviolet (UV) light. Recently, we proposed and demonstrated a novel, highly sensitive UV sensor based on a fiber Bragg grating (FBG). To ensure that the incident UV light is focused on the FBG surface, the sensor was coated with an azobenzene polymer material that acts as a UV-induced stretchable functional material, in combination with a cylindrical focal lens. In this study we have improved the sensitivity of the sensor by employing a cylindrical focal mirror as a curved reflector, to refocus the UV light passing through the FBG. We considered the performance of several different types of reflectors and chose the optimal radius of curvature for the reflector. Compared to the UV sensor without an auxiliary device, the sensitivity of the FBG sensor with a focal lens and a curved reflector was 15 times as high.

Development of Curing Process for EMC Encapsulation of Ultra-thin Semiconductor Package (초박형 반도체 패키지의 EMC encapsulation을 위한 경화 공정 개발)

  • Park, Seong Yeon;On, Seung Yoon;Kim, Seong Su
    • Composites Research
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    • v.34 no.1
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    • pp.47-50
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    • 2021
  • In this paper, the Curing process for Epoxy Molding Compound (EMC) Package was developed by comparing the performance of the EMC/Cu Bi-layer package manufactured by the conventional Hot Press process system and Carbon Nanotubes (CNT) Heater process system of the surface heating system. The viscosity of EMC was measured by using a rheometer for the curing cycle of the CNT Heater. In the EMC/Cu Bi-layer Package manufactured through the two process methods by mentioned above, the voids inside the EMC was analyzed using an optical microscope. In addition, the interfacial void and warpage of the EMC/Cu Bi-layer Package were analyzed through C-Scanning Acoustic Microscope and 3D-Digital Image Correlation. According to these experimental results, it was confirmed that there was neither void in the EMC interior nor difference in the warpage at room temperature, the zero-warpage temperature and the change in warpage.

Solder Alloy Types and Solder Joint Reliability Evaluation Techniques (솔더 합금 종류 및 솔더 조인트의 신뢰성 평가 기법)

  • You-Gwon Kim;Heon-Su Kim;Tae-Wan Kim;Hak-Sung Kim
    • Journal of the Microelectronics and Packaging Society
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    • v.30 no.1
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    • pp.17-29
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    • 2023
  • In this paper, a method for evaluating the reliability of solder joints is introduced, as they play a crucial role in packaging technology due to the miniaturization and high-performance requirements of electronic device. Firstly, properties of solder based on various alloy compositions and solder types are described, followed by an analysis of solder joint structures in different packages. Next, the influence of solder alloy composition and microstructure on the thermal and mechanical properties of solder is analyzed, and solder creep behavior is briefly introduced. Subsequently, analytical techniques considering creep models and fatigue models for reliability evaluation are presented, and various ways to improve the reliability of solder joints are discussed. This study is expected to provide valuable information for evaluating and enhancing the reliability of solder joints in the semiconductor packaging technology field.

Heat Dissipation Trends in Semiconductors and Electronic Packaging (반도체 및 전자패키지의 방열기술 동향)

  • S.H. Moon;K.S. Choi;Y.S. Eom;H.G. Yun;J.H. Joo;G.M. Choi;J.H. Shin
    • Electronics and Telecommunications Trends
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    • v.38 no.6
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    • pp.41-51
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    • 2023
  • Heat dissipation technology for semiconductors and electronic packaging has a substantial impact on performance and lifespan, but efficient heat dissipation is currently facing limited improvement. Owing to the high integration density in electronic packaging, heat dissipation components must become thinner and increase their performance. Therefore, heat dissipation materials are being devised considering conductive heat transfer, carbon-based directional thermal conductivity improvements, functional heat dissipation composite materials with added fillers, and liquid-metal thermal interface materials. Additionally, in heat dissipation structure design, 3D printing-based complex heat dissipation fins, packages that expand the heat dissipation area, chip embedded structures that minimize contact thermal resistance, differential scanning calorimetry structures, and through-silicon-via technologies and their replacement technologies are being actively developed. Regarding dry cooling using single-phase and phase-change heat transfer, technologies for improving the vapor chamber performance and structural diversification are being investigated along with the miniaturization of heat pipes and high-performance capillary wicks. Meanwhile, in wet cooling with high heat flux, technologies for designing and manufacturing miniaturized flow paths, heat dissipating materials within flow paths, increasing heat dissipation area, and reducing pressure drops are being developed. We also analyze the development of direct cooling and immersion cooling technologies, which are gradually expanding to achieve near-junction cooling.

SaaS Platform Structure Design for Authentication and Accounting based on Trusted Computing Technology (신뢰 컴퓨팅기술 기반 SaaS 인증 및 과금 플랫폼 구조 설계)

  • Lee, Sang Hwan;Kim, Jane Chungyoon;Jun, Sungik
    • Proceedings of the Korea Information Processing Society Conference
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    • 2007.11a
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    • pp.991-994
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    • 2007
  • 최근 컴퓨터 기술의 발전과 네트워크의 개방화 그리고 무선 모바일 통신 기술의 비약적인 보급으로 인하여 컴퓨팅 환경을 이루고 있는 각종 장치(PC, 모바일 단말, 저장장치, 네트워크 기기 등)가 다양한 형태의 보안 위협에 노출되어 데이터의 유실, 조작, 유출되어 금전적인 피해를 입거나 프라이버시 침해를 받고 있다. 이러한 문제를 근본적으로 해소하기 위하여 설립된 TCG(Trusted Computing Group)는 세계적인 IT 핵심기업들을 중심으로 구성된 비영리 단체로서 PC 혹은 모바일 기기 등의 단말과 서버 장비 그리고 저장 장치 및 네트워크로 구성된 컴퓨팅 환경에서 보안성 향상 및 데이터의 신뢰성을 제고하기 위하여 TPM(Trusted Platform Module)이라는 반도체 칩을 신뢰의 기반(root of trust)으로 한 신뢰 플랫폼을 제안하고 있다. 한편 SaaS(Software as a Service)는 패키지 형태의 소프트웨어를 네트워크 서비스 형태로 바꾸어 사용량에 비례한 요금제로 과금하는 방식을 채택하고 사용자가 온디맨드로 요청한 서비스를 적시에 제공하는 기술로 최근 전세계적으로 각광을 받고 있다. 이때 다양한 컴퓨팅 환경 안의 사용자에게 높은 신뢰성과 보안성 그리고 연속성을 갖는 SaaS 서비스를 제공하고 데이터의 무결성 및 비밀유지와 정확한 서비스 사용시간을 기록하고 업로드하는 기능들을 제공하는 SaaS 플랫폼은 TPM기반의 신뢰컴퓨팅 기술을 통하여 쉽게 구현될 수 있다. 본 논문에서는 일시적으로 네트워크와 차단된 상태의 PC 혹은 모바일 단말에서도 위의 조건들을 만족하는 SaaS 서비스를 지원하는 신뢰 플랫폼이 가져야 할 기능들에 대하여 분석-도출한 후 그러한 기능들을 제공하는 컴포넌트로 구성된 신뢰형 SaaS 사용자 플랫폼을 설계하였다.

Spalling of Intermetallic Compound during the Reaction between Electroless Ni(P) and Lead-free Solders (무전해 Ni(P)과 무연솔더와의 반응 중 금속간화합물의 spalling 현상에 관한 연구)

  • Sohn Yoon-Chul;Yu Jin;Kang S. K.;Shih D. Y,;Lee Taek-Yeong
    • Journal of the Microelectronics and Packaging Society
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    • v.11 no.3 s.32
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    • pp.37-45
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    • 2004
  • Electroless Ni(P) has been widely used for under bump metallization (UBM) of flip chip and surface finish layer in microelectronic packaging because of its excellent solderability, corrosion resistance, uniformity, selective deposition without photo-lithography, and also good diffusion barrier. However, the brittle fracture at solder joints and the spatting of intermetallic compound (IMC) associated with electroless Ni(P) are critical issues for its successful applications. In the present study, the mechanism of IMC spatting and microstructure change of the Ni(P) film were investigated with varying P content in the Ni(P) film (4.6,9, and $13 wt.\%$P). A reaction between Sn penetrated through the channels among $Ni_3Sn_4$ IMCs and the P-rich layer ($Ni_3P$) of the Ni(P) film formed a $Ni_3SnP$ layer. Thickening of the $Ni_3SnP$ layer led to $Ni_3Sn_4$ spatting. After $Ni_3Sn_4$ spatting, the Ni(P) film directly contacted the molten solder and the $Ni_3P$ phase further transformed into a $Ni_2P$ phase. During the crystallization process, some cracks formed in the Ni(P) film to release tensile stress accumulated from volume shrinkage of the film.

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산화아연 투명전극의 패터닝 및 나노막대 구조를 이용한 질화갈륨계 LED의 광추출효율 향상에 대한 연구

  • Park, Ji-Yeon;Son, Hyo-Su;Choe, Nak-Jeong;Lee, Jae-Hwan;Han, Sang-Hyeon;Lee, Seong-Nam
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.313-313
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    • 2014
  • GaN계 물질 기반의 광 반도체는 조명 및 디스플레이 관련 차세대 광원으로 많은 관심을 받고 있고, 효율 증대를 위한 에피, 소자 구조 및 패키지 등의 많은 연구가 진행되고 있다. 특히, 투명 전극을 이용한 광 추출 효율의 증가에 대한 연구는 전체 외부양자효율을 증가시키는 중요한 기술로 각광을 받고 있다. 이러한 투명전극은 가시광 영역의 빛을 투과하면서도 전기 전도성을 갖는 기능성 박막 전극으로 산화인듐주석이 널리 사용되고 있으나 인듐 가격의 상승과 산화인듐주석 전극 자체의 크랙 특성으로 인하여 많은 문제점이 지적되고 있다. 이러한 문제를 극복하기 위하여 GaN계 발광 다이오드에 있어서 산화인듐주석 투명 전극의 대체 물질들에 대한 많은 연구들이 활발하게 이루어 지고 있다. 특히, 투명전극 층으로 사용되는 산화인듐주석 대체 박막으로 산화아연에 대한 연구가 각광을 받고 있는 실정이다. 또한, 발광 다이오드의 효율 증가를 위해 발광소자에 표면 요철 구조 형성과 나노구조체 형성 등 박막 표면의 구조 변화를 통한 광추출효율 향상에 대한 많은 연구가 진행되고 있다. 본 연구에서는 산화아연 박막을 투명전극으로 사용하였으며 광추출효율 향상을 위해 산화아연 투명전극에 패터닝을 형성하고, 그 위에 산화아연 나노막대를 형성하여 기존에 사용하던 산화아연 투명전극보다 우수한 추출효율 및 전류 퍼짐 향상 구조를 제안하고 이에 따른 LED 소자의 광추출효율 향상을 연구하였다. 금속유기화학증착법을 이용하여 c-면 사파이어 기판에 n-GaN, 5주기의 InGaN/GaN 다중양자우물 구조 및 p-GaN의 간단한 LED구조를 성장한 후, p-GaN층 상부에 원자층 증착법을 이용하여 투명전극인 산화아연 박막을 60 nm 두께로 증착하였다. 산화아연 투명전극만 증착한 LED-A와 이후 0.1% HCl을 이용한 습식식각을 통하여 산화아연 투명전극에 육각형 모양의 패턴을 형성한 LED-B, 그리고 LED-B위에 전기화학증착법을 이용하여 $1.0{\mu}m$의 산화아연 나노 막대를 증착한 LED-C를 제작하였다. LED-A, -B 및 -C에 대한 표면 구조는 SEM이미지를 통하여 확인한 바 산화아연의 육각 패턴과 그 상부에 산화아연의 나노막대가 잘 형성된 것을 확인하였다. I-L 분석으로부터 패턴이 형성되지 않은 산화아연 투명전극으로만 구성된 LED-A에 비하여 산화아연 투명 전극에 육각 패턴을 형성한 LED-B의 전계 발광 세기가 더욱 큰 것을 확인하였다. 또한, 육각 패턴에 산화아연 나노막대를 성장시켜 융합구조를 형성한 LED-C에서는 LED-B와 -A보다 더 큰 전계 발광세기를 확인할 수 있었다. 특히, 인가 전류가 고전류로 갈수록 LED-C의 발광세기가 더욱 강해지는 것으로 효율저하현상 또한 나노융합구조의 LED-C에서 확인할 수 있었다. 이는 기존 산화아연 투명전극에 육각형의 패턴 및 나노막대융합구조를 형성할 경우 전류퍼짐현상을 극대화 할 뿐 아니라, 추가적인 광추출효율 향상 효과에 의해 질화갈륨 기반LED 소자의 광효율이 증가된 것으로 판단된다.

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