• Journal of IKEEE
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• v.22 no.4
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• pp.1006-1011
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• 2018

This paper proposes a three level buck converter utilizing multi-bit flying capacitor voltage control. The conventional three-level buck converter can not control the flying capacitor voltage, so that the operation is unstable or the circuit for controlling the flying capacitor voltage can not be applied to the PWM mode. Also when the load current is increased, an error occurs in the inductor voltage. The proposed structure can control the flying capacitor voltage in PWM mode by using differential difference amplifier and common mode feedback circuit. In addition, this paper proposes a 3bit flying capacitor voltage control circuit to optimize the operation of the three level buck converter depending on the load current, and a triangular wave generation circuit using the schmitt trigger circuit. The proposed 3-level buck converter is designed in $0.18{\mu}m$ CMOS process and has an input voltage range of 2.7V~3.6V and an output voltage range of 0.7V~2.4V. The operating frequency is 2MHz, the load current range is 30mA to 500mA, and the output voltage ripple is measured up to 32.5mV. The measurement results show a maximum power conversion efficiency of 85% at a load current of 130 mA.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.10
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• pp.2253-2260
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• 2012

In this paper, an efficient hardware architecture is proposed for inverse transform and inverse quantization of H.264/AVC decoder. The previous inverse transform and quantization architecture has a different AC and DC coefficients decoding order. In the proposed architecture, IQ is achieved after IT regardless of the DC or AC coefficients. A common operation unit is also proposed to reduce the computational complexity of inverse quantization. Since division operation is included in the previous architecture, it will generate errors if the processing order is changed. In order to solve the problem, the division operation is achieved after IT to prevent errors in the proposed architecture. The architecture is implemented with 3-stage pipeline and a parallel vertical and horizontal IDCT is also implemented to reduce the operation cycle. As a result of analyzing the proposed ITIQ architecture operation cycle for one macroblock, the proposed one has improved by 45% than the previous one.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.4B
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• pp.677-686
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• 2010

In this paper, we propose the virtual interface management scheme on the multi-mode mobile node for supporting multiple connections to various access networks in fixed mobile convergence (FMC) networks. The proposed scheme supports the virtualization of multiple physical network interfaces by presenting only the virtual interface to beyond IP layers and hiding physical network interfaces from them. In the proposed scheme, only one IP address is allocated to virtual interface without any IP allocations to physical network interfaces. Therefore, the proposed scheme does not change its IP address and keep it during the vertical handover, so that it can support the seamless handover of real-time multimedia services among heterogeneous access networks. The proposed scheme is implemented on the multi-mode mobile node with multiple network interfaces by using NDIS (Network Driver Interface Specifications) libraries. Through the mobility test-bed and the test application of virtual interface, we evaluate and analyze the performance of the proposed scheme.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.5
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• pp.367-373
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• 2001

A programmable A/D converter is designed with 8 N and P channel MOSFETs, respectively. In order to observe linear programmability of the EEPROM device during programming mode, a cell is developed with a 1.2 ${\mu}{\textrm}{m}$ double poly CMOS fabrication process in MOSIS. It is observed that the high resolution, of say 10m Volt, is valid in the range 1.25volts to 2volts. The experimental result is used for simulating the programmable 8 bit A/D converter with Hspice. The A/D converter is demonstrated to consume low power, 37㎽ by utilizing a programming operation. In addition, the converter is attained at the conversion frequency of 333 MHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.7 no.3
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• pp.254-262
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• 1996

In this paper, we present a polarizer that consists of three step rotary detents which can selectively convert linear polarzation into circular polarization and vice versa. For the design of the polarizer, the transmission line theory is applied to design the wa- veguide mode transducer for the modes to be smothly converted in waveguides, and a dielectric plate is inserted in circular waveguide for the conversion of a polarized wave with the angle of an inserted dielectric plate. Also, we simulated to obtain the optimum values of the transmission and the reflection coefficient characteristics at input and output port, and proved the propriety of the theory from the knowledge of measuring the constructed polarizer with the designed data.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.6
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• pp.92-98
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• 1998

The transform limited optical short pulses are generated by compression of pulses from a gain switched distributed feedback laser at 5 GHz repetition rate. The gain-switched pulses have the minimum pulse width of 27 psec with the spectral width of 1.1 nm. Thus the output pulses have a large amount of linear chirp and nonlinear chirp. We suppress the nonlinear chirp by passing the pulses through the optical band pass filter with 3 dB band width of 0.55 nm which is narrower than spectral width of the input pulses and generate 7.1 psec pulses by compressing the output with the dispersion compensating fiber. The pulses have time-bandwidth product of 0.49 which is close to the transform limited gaussian pulse. These pulses can be utilized as optical sources in 40 Gbit/s time division multiplexed optical transmission system.

• Journal of the Society of Naval Architects of Korea
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• v.39 no.2
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• pp.19-27
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• 2002

The early damage detection of large structures is very important to prevent the disaster due to its global failure. In this paper, a crack detection method of the beam-analogy structure based on the wavelet transformation of mode shape is presented. The method can effectively detect the singularity of mode shape caused to the inconsistency of bending moment and shear force at the damaged part using the discrete wavelet of mode shape and its inverse transforms of detail components. To investigate the validity and the applicability of the presented damage detection method, numerical simulation and experiment are carried out for the idealized beam and the real ship structures.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.1
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• pp.139-144
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• 2016

This paper describes functional circuits of DC-DC converter IC incorporated with variable frequency PFM technique. In case of output voltage of DC-DC converter is reached setting value or output current is low then PFM switching frequency is slow down. In this work a PFM signal generator, a PFM Frequency Control Circuit, an output voltage detector and an over current protection circuits are designed. This device has been designed at a $0.35[{\mu}m]$, double poly, double metal 12[V] CMOS process.

• Proceedings of the Korea Information Processing Society Conference
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• 2001.04a
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• pp.193-196
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• 2001

본 논문은 ATM(Abstract Timed Machine)으로 명세된 실시간 시스템에 대한 재/역공학 측면에서의 개발 및 검증을 위한 코드 변환기를 설계한다. ATM은 모드(mede), 전이(transition), 포트(per)로 구성되는데, 순공학 과정에서 실시간 시스템을 설계, 명세 하는 기존의 정형기법과는 달리 ATM은 소프트웨어의 순환공학 과정에서 사용하기 위해 설계되었다. ATM은 기존 정형기법이 순공학 과정에서의 특정 물리적 환경에서 실행되는 동적행위에 대한 부적절한 표현에 대해 순환공학에서 실시간 시스템의 속성은 물론 특정 환경과 동적 정보 등을 명세하기 위한 정형 기법으로서, 본 논문에서는 DoME을 이용하여 ATM 명세도구를 개발하고 이를 이용하여 실시간 시스템의 특정 요구사항을 위한 ATM을 명세한다. 또한 해당 ATM을 DOME/ATM 스크립트 파일로 저장하고 이에 대한 명세분석을 통해 노드와 관련된 정보를 추출하여 다른 분석도구가 이용할 수 있도록 DB에 저장하거나 매개 언어인 SRL/ATM으로 변환하며, 이러한 SRL/ATM으로부터 실행코드에 대한 관련 정보를 추출하여 실시간 시스템 개발 및 검증을 위한 Ada 코드를 생성할 수 있는 코드 변환기를 설계한다.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.7
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• pp.127-134
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• 2015

In this note, a continuous sliding surface transformed variable structure systems by the saturation function is presented for MIMO uncertain linear plants. A discontinuous sliding surface transformed VSS is proposed theoretically. The closed loop exponential stability together with the MIMO existence condition of the sliding mode on the predetermined sliding surface is investigated. For practical applications, a continuous approximation of the discontinuous VSS is made by means of the saturation function. The discontinuity of the control input as the inherent property of the VSS is much improved in view of the practical aspects. Through a design example and simulation studies, the usefulness of the proposed continuous transformed VSS controller is verified.