• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.9 s.351
• /
• pp.1-9
• /
• 2006

In the System-on-Chip(SoC) design, the global wires are critical parts for the performance. Therefore, the global wires need to be pipelined using flip-flops or latches. Since the timing constraint of the latch is more flexible than it of the flip-flop, the latch-based design can provide a better solution for the clock period. Retiming is an optimizing technique which repositions memory elements in the circuits to reduce the clock period. Traditionally, retiming is used on gate-level netlist, but retiming for SoC is used on macro-level netlist. In this paper, we extend the previous work of retiming for SoC using flip-flops to retiming for SoC using single-phase clocked latches. In this paper we propose a MILP for retiming for SoC using single-phase clocked latches, and apply the fixpoint computation to solve it. Experimental results show that retiming for SoC using latches reduces the clock period of circuits by average 10 percent compared with retiming for SoC using flip-flops.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.39 no.2
• /
• pp.123-131
• /
• 2002

In this paper, a new standard basis parallel ternary-valued multiplier circuit designed using current mode CMOS is presented. Prior to constructing the GF(3$^{ｍ}$) multiplier circuit, we provide a GF(3) adder and a GF(3) multiplier with truth tables and symbolize them, and also design them using current mode CMOS circuit. Using the basic ternary operation concept, a ternary adder and a multiplier, we develop the equations to multiply arbitrary two elements over GF(3$^{ｍ}$). Following these equations, we can design a multiplier generalized to GF(3$^{ｍ}$). For the proposed circuit in this paper, we show the example in GF(3$^{3}$). In this paper, we assemble the operation blocks into a complete GF(3$^{ｍ}$) multiplier. Therefore the proposed circuit is easy to generalize for m and advantageous for VLSI. Also, it need no memory element and the latency not less fewer than other circuit. We verify the proposed circuit by functional simulation and show its result.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.11
• /
• pp.35-43
• /
• 2008

A new effective parallel decoding method has been developed for context-based adaptive variable length codes. In this paper, several new design ideas have been devised for scalable parallel processing, less area, and less power. First, simplified logical operations instead of memory look-ups are used for fast low power operations. Second the codes are grouped based on their lengths for efficient logical operation. Third, up to M bits of input are simultaneously analyzed. For comparison, we have designed the logical operation based parallel decoder for M=8 and a typical conventional method based decoder. High speed parallel decoding is possible with our method. For similar decoding rates (1.57codes/cycle for M=8), our new approach uses 46% less area than the typical conventional method.

• Journal of KIISE:Computer Systems and Theory
• /
• v.33 no.6
• /
• pp.326-336
• /
• 2006

Due to the evolution of wired and wireless communication technologies and the Internet, multimedia services such as Internet broadcast and VOD have been prevalent recently. RTP is designed to be suitable for transmission of real-time multimedia data on the Internet by IETF While a variety of applications have utilized different RTPs implemented as a library, embeddedRTP is RTP-based kernel-level protocol that resolved performance issues of this kind of RTPs. This paper proposes the ExtendedERTP protocol based on existing embeddedRTP. This new protocol resolves a couple of issues such as packet processing overhead and buffer requirement and combines its APIs with BSD socket APIs which have been widely utilized in network applications. This paper demonstrates that this integration makes it possible to transmit real-time multimedia data through the accustomed interface of BSD socket APIs with nominal extra overhead. This paper also proposes a scheme for improving packet processing time by 15$\sim$20% and another scheme for reducing memory requirement for packet processing to about 3.5%, comparing with those of embeddedRTP.

• Journal of the Korean Association of Geographic Information Studies
• /
• v.12 no.1
• /
• pp.26-35
• /
• 2009

This paper will propose the efficient method that should be designed to utilize the design pattern of GoF(Gang of Four) for implementation of LBS(Location Based Service) mobile system. The design method proposed by this paper can design and implement system interface using creational patterns, structural patterns and behavioral patterns of design pattern from the user and mobile system viewpoint. The design method using design pattern can show increasing reusability of module and software, abridging the development time, minimizing the maintenance and decreasing the efficiency of memory of system to software development. Therefore, we used a design pattern in order to change the middleware applying geographic information system from mobile environment. Finally, the mobile system applied to design pattern shall contribute to showing high stability and reliability, improving reusability and scalability of module and software and developing efficient LBS mobile system.

• Journal of Korea Society of Industrial Information Systems
• /
• v.17 no.4
• /
• pp.41-50
• /
• 2012

Network life time is very important issue for wireless sensor network(WSN). It is very important to design sensor networks for sensors to utilize their energies in effective ways. A-PEGASIS that basically bases on PEGASIS and enhances in two aspects-an elegant chain generation algorithm and periodical update of chains. However, it has problems in the chain generation mechanism and some possibility of network partitioning or sensing hole problem in the network, in LEACH related protocols. This dissertation proposes a new clustering protocol to solve the co-shared problems in the previous protocols. The basic idea of our scheme is using the table for node connectivity. The results show that the network life time would be extended in about 1.8 times longer than LEACH and 1.5 times longer than PEGASIS-A.

• Journal of Korea Society of Industrial Information Systems
• /
• v.8 no.3
• /
• pp.19-31
• /
• 2003

For the implementation of large scale GRID systems, the performance scalability in resource scheduling is clearly to be addressed. In this research, we analyzed existing scheduling frameworks from the viewpoint of the performance and propose a novel resource scheduling framework called resource parameter based scheduling. Proposed scheduling framework consists of three components. The first is the resource parameter graph that expresses resource information via inter-resource relation and the composition base on the hierarchical structure. The second component is the resource parameter tree to be used for the implementation of the memory-based index of resource information. The third component is the resource information repository which mostly consists of static data to be used for the general resource information services. This paper presents the details of the framework.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.22 no.6
• /
• pp.1231-1243
• /
• 1997

Digital satellite communication channels have nonlinearities with memory due to saturation characteristics of traveling wave tube amplifier in the satellite and transmitter/receiver linear filters. In this paper, we propose a network structure and a learning algorithm for complex pi-sigma network (CPSK) and exploit CPSN in the problem of equalization of nonlinear satellite channels. The proposed CPSN is a complex-valued extension of real-valued pi-sigma network that is a higher-order feedforward network with fast learning while greatly reducing network complexity by utilizing efficient form of polynomials for many input variables. The performance of the proposed CPSN is demonstrated by computer simulations on the equalization of complex-valued QPSK input symbols distorted by a nonlinear channel modeled as a Volterra series and additive noise. The results indicate that the CPSN shows good equalization performance, fast convergence, and less computations as compared to conventional higher-order models such as Volterra filters.

• Journal of Korea Multimedia Society
• /
• v.10 no.4
• /
• pp.462-469
• /
• 2007

ATM protocol has the techniques such as cell discarding priority, traffic shaping and traffic policing. ATM based MPLS(Multiprotocol Label Switching) is discussed for its provisioning QoS commitment capabilities, traffic engineering and smooth migration for BcN using conventional ATM infra in Korea. This paper proposes preventive congestion control mechanism for detecting HTR(Hard To Reach) LSP(Label Switched Path) in ATM based MPLS systems. In particular, we decide HTR LSP using real time signaling information(etc., PTI,AIS/RDI) for applying HTR concept in circuit switching to ATM based MPLS systems and use those session gap and percentage based control algorithm that were used in conventional PSTN call controls. We concluded that it maximized the efficiency of network resources by restricting ineffective machine attempts. Proposed control can handle 208% call processing and more than 147% success call, than those without control. It can handle 187% BHCA(Busy Hour Call Attempts) with 100 times less than use of exchange memory.

• The KIPS Transactions:PartD
• /
• v.12D no.3 s.99
• /
• pp.335-344
• /
• 2005

Recently open data mining methods focusing on a data stream that is a massive unbounded sequence of data elements continuously generated at a rapid rate are proposed actively. Knowledge embedded in a data stream is likely to be changed over time. Therefore, identifying the recent change of the knowledge quickly can provide valuable information for the analysis of the data stream. This paper proposes a sliding window technique for finding recently frequent itemsets, which is applied efficiently in open data mining. In the proposed technique, its memory usage is kept in a small space by delayed-insertion and pruning operations, and its mining result can be found in a short time since the data elements within its target range are not traversed repeatedly. Moreover, the proposed technique focused in the recent data elements, so that it can catch out the recent change of the data stream.