• Journal of Satellite, Information and Communications
• /
• v.9 no.4
• /
• pp.73-76
• /
• 2014

With the increasing popularity of multi-core processors, they have been adopted even in embedded systems. Under this circumstance many multimedia applications can be parallelized on multi-core platforms because they usually require heavy computations and extensive memory accesses. This paper proposes an efficient thread-level parallel implementation for color space conversion on multi-core CPU. Thread-level parallelism has been becoming very useful parallel processing paradigm especially on shared memory computing systems. In this work, it is exploited by allocating different input pixels to each thread for concurrent loop executions. For the performance evaluation, this paper evaluate the performace improvements for color conversion on multi-core processors based on the processing speed comparison between its serial implementation and parallel ones. The results shows that thread-level parallel implementations show the overall similar ratios of performance improvements regardless of different multi-cores.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.9 no.6
• /
• pp.1211-1217
• /
• 2005

Current generation embedded systems are built around only a small number of SOCs, which are again based on general-purpose embedded micro-processors, such as ARM and MIPS. These RISC-based processors are not, however, designed for specific functions such as networking and multimedia processing, whose importances have increased dramatically in recent years. Network devices for small business and home networks, are especially dependent upon such SOCs based on general processors. Except for PHY and MAC layer functions, which are built with hardware, all the network functions are processed by the embedded micro-processor. Enabling technologies such as VDSL and FTTH promise Internet access with a much higher speed, while at the same time explore the limitations of general purpose microprocessors. In this paper we design a network processor, embed it into an SOC for Home gateway, evaluate the performance rigorously, and gauge a possibility for commercialization.

• Proceedings of the Korean Information Science Society Conference
• /
• 2003.10a
• /
• pp.217-219
• /
• 2003

멀티미디어 응용 프로그램은 방대한 양의 데이터를 실시간으로 고속 처리해야 한다. 적재/저장과 같은 메모리 참조 명령어는 프로세서의 고속 수행에 방해가 되는 주요인이다. 본 논문에서는 메모리 참조 속도를 향상시키기 위해 멀티미디어 데이터의 주소간격이 규칙적으로 참조되는 특성을 활용하여 다음에 참조될 데이터를 미리 캐시로 선인출 함으로써 실행시 캐시 미스율을 줄이고 또한 전체 수행시간을 줄이는 효과적인 방법을 제안한다. 제안한 방법은 캐시 미스율을 줄이는 방법으로서 데이터 선인출 기법을 사용하는데 주소간격을 이동한 기존 연구들에 비해 캐시 미스율에 있어서 평균적으로 27%향상되었다.

• Journal of Korea Multimedia Society
• /
• v.14 no.6
• /
• pp.813-823
• /
• 2011

This study is to suggest the facial animation methodology for that 3D character animators can use CGS system effectively during on their stage which they create ideas and use repeating a process of facial animation, it has suggested the CGS(Character Generation System) that is a creative idea generation methodology identified and complemented the problem of the existing computerized idea generation, in addition, this research being extended on the article vol.13, no.7, "CGS System based on Three-Dimensional Character Modeling II (Part2: About Digital Process)," on Korea Multimedia Society in July 2010 issue, Through the preceding study on 3D character facial expression according to character's feelings as an anatomical structure and the case study on character expressions of theatrical animation, this study is expected to have effectives as one method for maximization of facial animation and idea generation ability.

• Journal of Korea Society of Industrial Information Systems
• /
• v.26 no.5
• /
• pp.11-19
• /
• 2021

In this paper, we proposed an asymmetric multi-core processor scheduling scheme which is based on the mileage of each core. We considered a big-LITTLE multi-core processor structure, which consists of low power consuming LITTLE cores with general performance and high power consuming big cores with high performance. If a task needs to be processed, the processor decides a core type (big or LITTLE) to handle the task, and then investigate the core with the shortest mileage among unoccupied cores. Then assigns the task to the core. We developed a mileage-based balancing algorithm for asymmetric multi-core assignment and showed that the proposed scheduling scheme is more cost-effective compared to the traditional scheme from a management perspective. Simulation is also conducted for the purpose of performance evaluation of our proposed algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.36 no.1B
• /
• pp.80-85
• /
• 2011

The mount of network traffic from the Internet is increasing because of the use of Broadband Convergence Networks(BcN). Network traffic is also increasing because of the development of application, especially multimedia traffic from IPTV, VOD, and online games. This multimedia traffic not only has a huge payload but also should be considered a threat in real time. For this reason, this study examines the ways that routers distribute the bandwidth in accordance to traffic properties. To classify the property of the traffic, it is essential to analyze the application layer. However, the general network processor architecture serially processes the L2-4 and L7 layer. We propose a novel parallel network processor architecture with a global cache that processes L2-4 and L7 in parallel. To verify the proposed architecture, we simulated both of the architecture with SystemC. EEMBC and SNORT was used to measure L2-4 and L7 processing time. When multimedia traffic was entered into the network processor in the same flow, the proposed architecture showed about 85% higher performance than general architecture.

• Journal of Korea Multimedia Society
• /
• v.13 no.7
• /
• pp.950-959
• /
• 2010

The Election paradigm can be used as a building block in many practical problems such as group communication, atomic commit and replicated data management where a protocol coordinator might be useful. The problem has been widely studied in the research community since one reason for this wide interest is that many distributed protocols need an election protocol. However, mobile ad hoc systems are more prone to failures than conventional distributed systems. Solving election in such an environment requires from a set of mobile nodes to choose a unique node as a leader based on its priority despite failures or disconnections of mobile nodes. In this paper, we describe a solution to the election problem from mobile ad hoc computing systems and it was proved by temporal logic. This solution is based on the Group Membership Detection algorithm.

• Journal of the Korea Society of Computer and Information
• /
• v.17 no.8
• /
• pp.1-10
• /
• 2012

This paper proposes design space exploration methodology of many-core processors including multimedia specific instructions to support high-performance and low power ultrasound imaging for portable devices. To explore the impact of multimedia instructions, we compare programs using multimedia instructions and baseline programs with a same many-core processor in terms of execution time, energy efficiency, and area efficiency. Experimental results using a $256{\times}256$ ultrasound image indicate that programs using multimedia instructions achieve 3.16 times of execution time, 8.13 times of energy efficiency, and 3.16 times of area efficiency over the baseline programs, respectively. Likewise, programs using multimedia instructions outperform the baseline programs using a $240{\times}320$ image (2.16 times of execution time, 4.04 times of energy efficiency, 2.16 times of area efficiency) as well as using a $240{\times}400$ image (2.25 times of execution time, 4.34 times of energy efficiency, 2.25 times of area efficiency). In addition, we explore optimal PE architecture of many-core processors including multimedia instructions by varying the number of PEs and memory size.

• Information and Communications Magazine
• /
• v.19 no.4
• /
• pp.53-61
• /
• 2002

세계는 현재 디지털 혁명에 의한 새로운 정보통신(IT) 서비스의 홍수에 직면해있다. '언제, 어디서나, 사용자의 요구에 맞추어'라는 말은 이미 모든 서비스 기술개발 분야에서 캐치프레이즈로 자리잡은지 오래 되었다. 통신은 기존 전화를 통한 음성 서비스 위주에서 점차 데이터 통신으로 무게 중심이 이동되고 있고, 방송도 단순한 영상물 중심의 프로그램 전달이 아닌 개인별 정보 전달 및 양방향 통신에 의한 부가서비스로 그 영역을 확장해가지고 있다. 이런 변화의 중심에는 역시 '디지털' 기술에 의해 가능한 '융합(Convergence)' 화를 위한 기술개발이 그 동력을 제공하고 있으며, 프로세서 , 메모리, 디스플레이, 모뎀 등 하드웨어의 발전과 함께 오디오비쥬얼 신호 압축 및 전송, 웹 문서처리 등 소프트웨어적인 기술 개발 및 표준화 결과를 상호 유기적이고 통합적으로 각 응용 서비스 시스템에 적용함으로써 가능해지고 있다. 본 고에서 데이터 방송, 지능형 방송 및 MPEG-21 멀티미디어 프레임워크 표준을 중심으로 방송의 입장에서 본 방송통신융합의 기술개발 현황과 전망에 대해 개괄해보기로 한다.

• Proceedings of the Korean Information Science Society Conference
• /
• 2004.10c
• /
• pp.394-396
• /
• 2004

본 논문은 디지털 TV에 접목하는 멀티미디어 부가기능 모듈 내의 영상 출력 처리부 개발에 관한 것이다. 이 영상 출력 처리부는 영상 데이터 처리부로 부터의 저 프레임의 HD영상 입력을 TV시스템에서 사용 가능한60프레임의 HD영상으로 출력하는 기능을 수행한다. 이렇게 함으로써 기존 시스템의 영상 처리부에서 60프레임의 영상 출력을 위해 사용한 프로세서 성능을 제안된 시스템에서는 저 프fp임 영상 출력에 해당하는 정도로 줄여줄 수 있으며 이는 시스템의 비용 절감 및 다양한 부가 기능 추가로 연결 되어질 수 있다.