• Proceedings of the Korean Information Science Society Conference
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• 2003.10b
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• pp.826-828
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• 2003

이제까지 Protein이나 RNA와 같은 분자의 구조는, 대부분 X-ray crystallography나 Nuclear Magnetic Resonance (NMR) 방법을 통해 분석이 이루어 졌다. 이 방법들은 실제 분자를 직접 원자레벨에서 분석하는 방법으로, 분자를 구성하는 모든 원자의 3차원 좌표 정보를 얻어 낼 수 있다. 원자의 3차원 좌표 정보는 분자의 전체적인 모양과 구조를 이해하는데 유용한 정보이다. 하지만, 분자의 구조를 좀 더 완벽히 이해하기 위해서는 원자 레벨의 좌표 정보 보다는 좀 더 높은 차원에서의 구조 정보가 필요하다. 특히 분자의 구조를 예측하거나, 분자들 사이에 결합 관계를 예측하기 위해서는, 원자 레벨의 정보만으로는 필요한 모든 정보를 얻을 수 없다. 이러한 경우, 분자의 2차원 또는 3차원 구조 요소 (structural elements)가 더욱 좋은 정보를 제공해 줄 수 있다. Protein 분자의 경우. 이미 3차원 좌표 정보를 이용해서, 2차원 구조 요소를 알아내는 자동화된 방법이 알려져 있다. 그러나 RNA의 경우 protein에 비해 알려진 결정 구조가 적기 때문에. 아직까지 2차원 구조 요소나 3차원 구조 요소를 알아내는 자동화된 방법이 알려져 있지 않다. 따라서, 이제까지는 RNA의 구조 요소를 알아내기 위해, 사람이 직접 RNA분자의 3차원 좌표 정보를 분석함으로써 많은 시간과 노력이 필요했다. 이 때문에, 우리는 RNA의 원자들의 3차원 좌표 정보를 이용해서, 2차원 구조요소와 3차원 구조 요소 정보를 자동화된 방법으로 밝혀내는 알고리즘을 개발하였다. 우리는 분자를 구성하고 있는 원자들의 3차원 좌표 정보를 Protein data bank (PDB)에서 가져왔다. 우리의 알고리즘은 PDB file형태의 데이터라면 protein-RNA 복합체나 RNA 분자 모두에서 RNA의 2차원 구조 요소나 3차원 구조 요소를 얻어낼 수 있다. 우리의 연구는 RNA의 원자레벨의 3차원 좌표 정보를 이용해서 RNA의 구조 요소를 뽑아내는 첫 번째 시도로, 우리의 알고리즘을 통해 얻어진 구조 정보는 RNA의 구조 예측 연구나. protein-RNA complex의 결합 예측 연구에 많은 도움을 줄 수 있으리라 기대된다.

• Journal of the Institute of Convergence Signal Processing
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• v.3 no.4
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• pp.23-28
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• 2002

In this paper, we have proposed the hardware architecture which implements the algorithm for retaining the connectivity which prevents the disconnection in the gray-scale image thinning. To extract the skeleton from the image in a real time, it is necessary to examine the connectivity of the skeleton in a real time. The proposed architecture finds the connectivity number in the 4-clock period. The architecture consists of three blocks, PS(Parallel to Serial) Converter and Stare Generator and Ridge Checker. The PS Converter changes the 3$\times$3 gray level image to four sets of image pixels. The State Generator examines the connectivity of the central pixel by searching the data from the PS Converter. The Ridge Checker determines whether the central pixel is on the skeleton or not. The proposed architecture finds the connectivity of the central pixel in a 3$\times$3 gray level image in the 4-clocks. The total circuits are verified by the design tools and operate correctly.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.10
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• pp.1835-1841
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• 2006

Demand of enhanced bilge separation sensor system has been recently increased due to the severe regulation reinforcement of MEPC(Marine Environment Production Committee). Up to date bilge separation sensor has to be extremely accurate and highly reliable. To design and build such a bilge separator. a precise oily water separation level sensor that distinguishes oil from water is critical. Three dimensional simulations have been carried out to figure out the characteristics of capacitive level sensors, which grounds the finding of the parameters required to design the sensors. The parasitic capacitance problem which is inherent to capacitive level sensors has been taken care of. This paper concludes with the future research direction that can be pursued with the newly defined parameters of the capacitive level sensors.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.2
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• pp.135-141
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• 2006

In this paper, LC output filters are designed to reduce output harmonics and harmonic analysis are peformed. Generally, multilevel inverters are used in high power application and operates with low switching frequency, which, in turn, generates large output harmonics. Output filters we used to reduce output harmonics. The design approach to reduce output harmonics of the 31eve1 multilevel inverter is discussed and DSP(TMS320C31) is used for the digital control of the system. The design example is given. The designed system is verified by simulation and experiment.

• The Korean Journal of Pain
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• v.8 no.1
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• pp.51-54
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• 1995

척추마취는 국소마취제를 지주막하강에 주입하여 척수신경 전근과 후근을 차단하는 방법으로 하복부나 하지 수술 뿐 아니라 만성 통증과 암성 통증의 치료에도 이용되고 있는데 마취시간이나 제통시간의 연장 및 적절한 피부분절의 마취나 진통의 달성은 척추마취에서 중요한 사항이다. 본 연구에서는 morphine정주가 척추마취에 어떤 영향을 주는지 알아보기 위해 척추마취하에서 하지 수술을 받은 40명의 환자를 대상으로 척추마취를 시행한 80분에 척추마취 레벨, 수축기 및 이완기 혈압, 맥박 그리고 호흡수를 조사한후 morphine 10 mg을 정맥내로 주사후 20분후에 척추마취 레벨과 혈압, 맥박, 호흡수를 조사하여 다음과 같은 결과를 얻었다. 1) 척추마취 레벨은 morphine 투여진 $T_{7.5{\pm}0.32}$에 비해 morphine 투여 20분후에 $T_{6.0{\pm}0.31}$로 의의있게 상승하였다 (p<0.005). 2) 수축기 및 이완기 혈압과 맥박수는 morphine투여전과 투여후에 의의있는 변화가 없었다. 3) 호흡수는 morphine 투여전에 비해 투여후 감소가 있었다(p<0.005). 이상의 결과로 척추마취하에서 수술을 시행할 때나 통증치료시 전신적으로 morphne을 투여하여 마취와 진통부위를 넓일 수 있을 것으로 사료된다.

• Korean Journal of Environment and Ecology
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• v.17 no.4
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• pp.383-395
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• 2004

To evaluate the natural environmental conditions of the local areas, the methods using the plant species and plant community are discussed here, Based on Ohba's(1979), Nakanish's(1980a: 1980b), Okuda and Nakamura's(1989), and Haber et al.'s systems(1991), as the evalution-items, 9 in plant species level and 16 in plant community level are proposed. The evalution-items are classified as 3 criteria in plant species level and 4 criteria in plnat community level. The evalution method could be used to promote the spacial planning and to alleviate other administrative problems. Also it could be applied to decide conservation level of plant species and plant community.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.4
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• pp.288-295
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• 2010

Multi-level inverters have drawn much of attention in recent years because it can meet the demand of high power applications and good power quality associated with reduced harmonic distortion. As the number of voltage level increases, field programmable gate arrays (FPGAs) are suitable for the implementation of multi-level modulation algorithm. This paper proposes the implementation method for generating PWM pulses at the three phase diode clamped five-level inverter using FPGA. The strategy for communicating stably the data of three-phase reference voltages between the DSP and FPGA is suggested. The techniques for generating PWM signals based on a multi-carrier modulation method are carried out through the experiments with 32-bit DSP and Cyclone-III FPGA.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.12
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• pp.136-145
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• 2009

This paper proposes control methods and simulation models of a driving system, which consists of converters and inverters, for high speed trains employing multi-level power converters. The control method of a single phase three-level converter for high-speed trains is designed to use DC values instead of instantaneous current values which are usually used in single-phase application, so that it results in a fast and robust voltage control response. In addition, simulation models of Space Vector Pulse Width Modulation (SVPWM) for single phase three-level converters as well as three level inverters are proposed. Experimental results demonstrate the validity of the simulation model for three-level inverters.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.3
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• pp.205-212
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• 2007

This paper presents a direct instantaneous torque control (DITC) of Switched Reluctance Motor (SRM) with a novel 4-level converter to develop a uniform torque and to improve a dynamic performance. The DITC method can reduce a high torque ripple of SRM. Drive efficiency and dynamic performance with conventional drive are low due to a slow excitation current build-up. Since the 4-level converter can obtain an addition boosted voltage to have a fast excitation and demagnetization, it can Improve dynamic performance and efficiency easily. To apply the DITC technique to a 4-level converter, a novel control scheme is presented according to the operating modes. Additionally, selection of capacitances of boosted capacitor and efficiency improvement of 4-level converter are analyzed. At last, the validity of proposed method is verified by some computer simulations md comparative experiments.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.3
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• pp.234-240
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• 2007

In this paper, a novel multi-level inverter for low cost high speed switched reluctance(SR) drive is proposed. The proposed multi-level converter has reduced number of power switches and diodes than that of a conventional asymmetric converter for SRM and smaller voltage rating of the dump capacitor comparing with energy efficient c-dump converter. It can supply five operating modes that is boosted, DC-link, zero, negative bias and negative boosted voltage. The proposed multi-level converter has fast excitation and demagnetization modes of phase current, so dynamic response can be achieved. The proposed multi-level converter is verified by computer simulation and experimental results.