• Proceedings of the Korean Information Science Society Conference
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• 1998.10a
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• pp.621-623
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• 1998

본 논문에서는 공용 접근이 가능한 NTO 서버들에 대한 동기화 특성을 조사, 분석했다. 분석 주요 항목은 서버 신뢰도, 정확도 그리고 오프셋(offeset)과 전송지연의 관계이다. 이러한 분석을 위해 NTP알고리즘에서 최적 시간 동기를 위해 선택하는 값인 클럭 옻프셋, 일주지연, 분산 그리고 동기화 거리를 사용하였다. 분석 결과는동기화 거리 값의 경우 최대 700ms의 정도의 차이를 보이고, 분산의 경우 최대 300ms정도의 차이를 나타내었다. 또한 전송 지연과 오프셋은 타워 분포를 보이며, 이는 그간의 오프셋 근거의 단순 선택이 효율적이지 못할 수 있음을 보여주었다. 본 논문에서 살펴본 NTP서버 동기화 특성은 많은 NTP 서버중 최적의 조건을 찾는데 유용하게 쓰일 수 있다.

• Proceedings of the Korea Information Processing Society Conference
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• 2017.04a
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• pp.1179-1182
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• 2017

최근 사물인터넷(IoT, Internet of Things)관련 기술의 발전 및 서비스 산업의 급속한 발전으로 센서 장치에 대한 수요가 증가하고 있다. 센서 장치는 사물인터넷 플랫폼과의 연동을 위한 통신 인터페이스를 필수로 지원하여야 하며, 그 외에 다양한 센서들의 연동 인터페이스와 소비 전력을 모두 고려하여 하드웨어 및 소프트웨어의 설계가 이루어져야 한다. 이와 같이 센서 장치는 베터리 소비를 최적화하여 모든 기능이 구현되어야 하므로 기능상의 제약이 많이 따른다. 시간 동기화를 위해 사물인터넷 플랫폼에서 송신하는 동기 메시지를 수신하기 위해 슬립모드를 지원하는 경우 센서 장치가 항상 깨어 있어 야하므로 저전력으로 동작 할 수 없는 어려움이 따른다. 따라서 사물인터넷망에서 시간동기화를 위한 마스터 클럭을 선정 방법을 제안하고 이를 위한 단일 프레임 방식을 제안한다. 향후 시간 동기화 프로토콜의 호환을 위해 CoAP 규격과 연동 될 수 있는 연구가 필요하다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.4
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• pp.644-650
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• 2001

A remotely located synchronization system which is locked to the remote master clock has been implemented by using GPS Common-View technique. The measurement results showed that the accuracy of the remote synchronization system could be kept within a few parts in $10^{-12}$ and MTIE(Maximum Time Interval Error) met the ITU-T Recommendation(G.811). A prototype system having fully automatic operational functions has been realized up to now and is expected to be used in the network synchronization in the near future.

• Journal of KIISE:Software and Applications
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• v.37 no.8
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• pp.647-652
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• 2010

Esterel is an imperative synchronous language well-adapted to control-intensive systems. When an Esterel program is translated to a circuit, the synchronizer of a parallel statement may be executed more than once in a clock; the synchronizer is called schizophrenic. Existing compilers cure the problems of schizophrenic parallel synchronizers using logic duplications. This paper proposes the conditions under which a synchronizer causes no problem in circuits when it is executed more than once in a clock. In addition we design a detection algorithm based on those conditions. Our algorithm detects schizophrenic parallel synchronizers that have to be duplicated in Esterel source codes so that compilers can save the size of synthesized circuits

• The Journal of the Korea Contents Association
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• v.9 no.7
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• pp.76-85
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• 2009

UWB signal with high resolution capability can be used to estimate ranging and positioning in wireless personal area network. The node works on its local clock and the frequency differences of nodes have serious affects on ranging algorithms estimating locations of mobile nodes. The low rate UWB, IEEE802.15.4a, describes asynchronous two way ranging methods such as TWR and SDS-TWR working without any additional network synchronization, but the algorithms can not eliminate the effect of clock frequency differences. Therefore, the mechanisms to characterize the crystal difference is essential in typical UWB PHY implementations. In high rate UWB, characterizing of crystal offset with tracking loop is not required. But, detection of the clock frequency offset between the local clock and remote clock can be performed if there is little noise induced jitter. In this paper, we complete related ranging equations of high rate UWB based on TWR with relative frequency offset, and analyze a residual error in the ideal equations. We also evaluate the performance of the relative frequency offset algorithm by simulation and analyze the ranging errors according to the number of TWR to compensate coarse clock resolution. The results show that the relative frequency offset compensation and many times of TWR enhance the performance to converge to a limited ranging errors even with coarse clock resolutions.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.88-90
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• 2012

This paper describes a 10-bit 10-MS/s asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) with a rail-to-rail input range. The proposed SAR ADC consists of a capacitor digital-analog converter (DAC), a SAR logic and a comparator. To reduce the frequency of an external clock, the internal clock which is asynchronously generated by the SAR logic and the comparator is used. The time-domain comparator with a offset calibration technique is used to achieve a high resolution. To reduce the power consumption and area, a split capacitor-based differential DAC is used. The designed asynchronous SAR ADC is fabricated by using a 0.18 um CMOS process, and the active area is $420{\times}140{\mu}m^2$. It consumes the power of 0.818 mW with a 1.8 V supply and the FoM is 91.8 fJ/conversion-step.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.4 no.4
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• pp.286-294
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• 2011

Cable modems typically are implemented by a forward error correction(FEC) scheme. The ITU-T Recommendation J-38 Annex B specifies using 64- and 256- quadrature amplitude modulation (QAM) and extended RS coding scheme. In implementing the cable modem, there are some problems to fabricate and fitting on FPGA chip. First, many clocks are needed in implementing cable modem because of different code rate and different modulation types. To reduce the number of clocks, we use the two memories, which are different clock speed for reading and writing data. Second, this system lost the bit-synchronization and frame-synchronization in decoder, the system recognize that all data is error. This paper solves the problems by using simple 5-stage registers and unique sync-word. Based on solutions for about problems, the cable modem is fabricated on FPGA chip name as Vertex II pro xc2vp30-5 by Xilinx, and we confirmed the effectiveness of the results.

• The KIPS Transactions:PartC
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• v.16C no.2
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• pp.229-236
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• 2009

UWB signal with high resolution capability can be used to estimate ranging and positioning in wireless personal area networks. The clock frequency differences of nodes have serious affects on asynchronous ranging methods to estimate locations of mobile nodes. The specification of high rate UWB describes successive TWR method with the estimation of a relative clock frequency offset. In this paper, we complete the ranging equations using relative frequency offset and time information, and propose a method to estimate the exact frequency offsets. We evaluate the ranging algorithms with simulation. The results show that the performances of the algorithms using frequency offsets are very close without noise. But, at noise environment, the method of exact frequency offsets shows better performance than that of relative frequency offsets.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.6
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• pp.835-846
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• 1999

In this experiment I have made FM-DS/SS system replacing 170.120 MHz by utilizing FM transmitter and receiver. In the transmitter, the result shows that the modulated FM-DS/SS signal is a typical $(sin \chi/\chi)^2$ spectrum by using the clock(1.329 MHz) of PN divided from FM carrier. In the receiver, SO(Synchronous Oscillator) was applied to despread. Like figure 1, 2, and 4 when I applied SO, which consists of sliding correlator, to synchronous a favorable properties could be obtained in the receiver of FM-DS/SS system. In this paper, I used SO in order to take synchronous in the construction of FM-DS/SS system, and to support it I presented the result of the experiment on synchronous curve and properties of OS.

• Proceedings of the Korea Multimedia Society Conference
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• 1998.04a
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• pp.333-338
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• 1998

본 논문에서는 AAL-2/ATM 통신망 환경에서 멀티미디어 통신을 구현하기 위한 멀티미디어 동기화 기능으로 VGC 기반의 SRTS/AAL-2를 제안한다. 제안된 멀티미디어 동기화 알고리즘에서는 가변 비트율 멀티미디어 정보의 클럭 주파수 복원을 위하여 VGC(Virtual Global Clock)을 구성하고, 이를 기반으로 한 SRTS방식의 미디어 내부 동기와, MM-SSCFS(Multimedia-SSCS)/AAL-2 프로토콜을 사용한 미디어 간의 동기를 유지하는 방법을 제안하였다. 본 논문의 실험 환경으로는 Fore ATM 교환기(155 Mbps $\times$8 port)를 사용해서 소규모 B-ISDN/ATM 통신망을 구성하였고, SUN Workstatin Solaris 2.5에 접속된 Fore ATM 접속 카드 SBA-200에서 지원하는 XTI(X/Opne Transport Interface)-API를 사용하였다.