• Title/Summary/Keyword: 데드도

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Dead Zone Correction for Abundance Estimation of Demersal Fish by Acoustic Method (저서어자원량의 음향추정에 있어서 해저 데드존의 보정에 관한 연구)

  • 황두진
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.36 no.3
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    • pp.202-209
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    • 2000
  • In order to estimate demersal fishes using acoustic echo sounders and echo integrators, we consider several problems that are accurate bottom detection, optimum bottom offset and dead zone. The dead zone where no fish detection are summed distance resolution by the half pulse length of transmitted pulse and beam angle above the seabed. This paper has considered the dead-zone correction method to be technically correct for survey of demersal fishes. A comparison between near-bottom SV profiles acquired in Funka Bay, Hokkaido, of Japan, the East China Sea and the Yellow Sea, of Korea, with before and after the bottom correction, shows that the SV obtained with after the bottom correction is 2∼3dB higher than before the bottom correction in Funka Bay, and 17dB higher in East China Sea, too.

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Design of High Voltage Gate Driver IC with Minimum Change and Variable Characteristic of Dead Time (최소 변동 및 가변 데드 타임을 갖는 고전압 구동 IC 설계)

  • Mun, Kyeong-Su;Kim, Hyoung-Woo;Kim, Ki-Hyun;Seo, Kil-Soo;Cho, Hyo-Mun;Cho, Sang-Bock
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.12
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    • pp.58-65
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    • 2009
  • In this paper, we designed high voltage gate drive IC including dead time circuit in which capacitors controlled rising time and falling time, and schimitt-triggers controlled switching voltage. Designed High voltage gate drive IC improves an efficiency of half-bridge converter by decreasing dead time variation against temperature and has variable dead time by the capacitor value. and its power dissipation, which is generated on high side part level shifter, has decreased 52 percent by short pulse generation circuit, and UVLO circuit is designed to prevent false-operation. We simulated by using Spectre of Cadence to verify the proposed circuit and fabricated in a 1.0um process.

Deadlock Detection of Software System Using UML State Machine Diagram (UML State Machine Diagram을 이용한 소프트웨어 시스템의 데드락 탐지)

  • Min, Hyun-Seok
    • Journal of Convergence Society for SMB
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    • v.1 no.1
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    • pp.75-83
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    • 2011
  • Unified Modeling Language (UML) is widely accepted in industry and particularly UML State Machine Diagram is popular for describing the dynamic behavior of classes. This paper discusses deadlock detection of System using UML State Machine Diagram. Since a State Machine Diagram is used for indivisual class' behavior, all the State Machine Diagrams of the classes in the system are combined to make a big system-wide State Machine Diagram to describe system behavior. Generally this system-wide State Machine Diagram is very complex and contains invalid state and transitions. To make it a usable and valid State Machine Diagram, synchronization and externalization are applied. The reduced State Machine Diagram can be used for describing system behavior thus conventional model-checking technique can be applied. This paper shows how deadlock detection of system can be applied with simple examples. All the procedures can be automatically done in the tool.

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Dead Block-Aware Adaptive Write Scheme for MLC STT-MRAM Caches

  • Hong, Seokin
    • Journal of the Korea Society of Computer and Information
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    • v.25 no.3
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    • pp.1-9
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    • 2020
  • In this paper, we propose an efficient adaptive write scheme that improves the performance of write operation in MLC STT-MRAM caches. The key idea of the proposed scheme is to perform the write operation fast if the target MLC STT-MRAM cells contain a dead block. Even if the fast write operation on the MLC STT-MRAM evicts a cache block from the MLC STT-MRAM cells, its performance impact is low if the evicted block is a dead block which is not used in the future. Through experimental evaluation with a memory simulator, we show that the proposed adaptive write scheme improves the performance of the MLC STT-MRAM caches by 17% on average.

A Study on Deadbeat Control Systme of DC Motro Driving a Rotational Mechanical System (회전기계 계통을 가동시키는 직류전동기의 데드비트제어시스템 연구)

  • 송자윤
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 1999.12a
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    • pp.477-483
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    • 1999
  • This paper presents a design of deadbeat control system for DC motor driving such a rotational mechanical system with gear as a printing machine. The deadbeat response design developed for control system of a sampled continuous-data process does not guarantee zero intersampling ripples, but the proposed deadbeat control system that consists of the integral controller and the full-order state observer, has many advantages such as an output response without the ripples, and setting time than the optimal control system in the same sampling period. The results of case study through MATLAB simulation are shown that the efficiency of the proposed controller for DC motor driving a rotational system with gear is verified by comparing with optimal controller etc..

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Design of Deadbeat Controller for DC Motor Driving a Rotational Mechanical System (회전기계 계통을 가동시키는 직류전동기를 위한 데드비트제어기 설계)

  • 이흥재;송자윤
    • Journal of Korea Society of Industrial Information Systems
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    • v.5 no.1
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    • pp.31-36
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    • 2000
  • This paper presents a design method of deadbeat controller for DC motor driving a rotational system with gear. The deadbeat-response design developed for control system of a sampled continuous-data process does not guarantee zero intersampling ripples, but the proposed deadbeat control system that consists of the integral controller and the full-order state observer, and zero-order hold using in continuous systems, has many advantages such as an output response without the ripples and reaching the steady state without error after a given sampling period and faster settling time than the optimal control system in the same sampling period. The results of a case study through matlab simulation are shown that the efficiency of the proposed controller for DC motor driving a rotational system with gear is verified by comparing with optimal controller etc.

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The Analysis and Compensation of Dead Time Effects in a Vector-Controlled Induction Machine (벡터 제어 유도 전동기의 데드 타임 효과 해석 및 보상)

  • Kim, Seong-Hwan;Ryoo, Young-Jae;Chang, Young-Hak
    • Journal of IKEEE
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    • v.4 no.2 s.7
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    • pp.225-232
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    • 2000
  • Dead time which is inserted in PWM signals of VSI distorts the inverter output voltage waveforms and deteriorate the control performance of an induction machine by producing torque ripples. In this paper, dead time compensation method in a vector controlled induction machine is proposed. The method is based on a feedforward approach that compensates dead time effect by adding the compensating voltages to the inverter output voltage references in 2 phase stationary frame. The proposed method is only software intensive and easy to realize without additional hardware. The experimental results show the validity and effectiveness of the proposed method.

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Design of a Variable Structure Speed Controller having a Dead Zone Switching layer for the Sinusoidal type Brushless DC Motor (데드 존 스위칭 영역을 갖는 정현파형 브러시리스 직류전동기의 가변구조 속도제어기 설계)

  • 김세일;최중경;박승엽
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.3
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    • pp.639-650
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    • 1999
  • In this paper, a chattering alleviation VSS controller for the sinusoidal type BLDC motor is designed. Dead Zone function is proposed to change the chattering occurring in the transient state from high frequency to low frequency and time-varying gains are applied for the control input to eliminate the steady state excessive chattering in the conventional ISM. The proposed Dead Zone function represents the sliding layer composed of two switching surfaces and if a state vector exists in this layer, the chattering don't occur. Simulation and experimental results confirm the useful effects of the above algorithm.

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An Efficient Coverage Algorithm for Intelligent Robots with Deadline (데드라인을 고려하는 효율적인 지능형 로봇 커버리지 알고리즘)

  • Jeon, Heung-Seok;Jung, Eun-Jin;Kang, Hyun-Kyu;Noh, Sam-H.
    • The KIPS Transactions:PartA
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    • v.16A no.1
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    • pp.35-42
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    • 2009
  • This paper proposes a new coverage algorithm for intelligent robot. Many algorithms for improving the performance of coverage have been focused on minimizing the total coverage completion time. However, if one does not have enough time to finish the whole coverage, the optimal path could be different. To tackle this problem, we propose a new coverage algorithm, which we call MaxCoverage algorithm, for covering maximal area within the deadline. The MaxCoverage algorithm decides the navigation flow by greedy algorithm for Set Covering Problem. The experimental results show that the MaxCoverage algorithm performs better than other algorithms for random deadlines.

Deadlock-free Routing of an ACV in Accelerated Motion (가감속을 고려한 교착없는 AGV 주행경로설정)

  • Choe, Ri;Park, Tae-Jin;Ryu, Kwang-Ryel
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • v.1
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    • pp.387-392
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    • 2006
  • In the environment where AGVs(Automated Guided Vehicles) operate concurrently in limited space, collisions. deadlocks, and livelocks which have negative effect on the productivity of AGVs occure more frequently. The accelerated motion of an AGV is also the factor that make the AGV routing more difficult because the accelerated motion makes it difficult to estimate the vehicle's exact travel time. In this study, we propose methods of avoiding collisions, deadlocks, and livelocks using OAR(Occupancy Area Reservation) table, and selecting best route by estimating the travel time of an AGV in accelerated motion. A time-driven simulation validated the effectiveness of the proposed methods.

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