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Path Delay Test-Set Preservation of De Morgan and Re-Substitution Transformations (드모르간 및 재대입 변환의 경로지연고장 테스트집합 유지)

  • Yi, Joon-Hwan;Lee, Hyun-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • 제47권2호
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    • pp.51-59
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    • 2010
  • Two logic transformations, De Morgan and re-substitution, are sufficient to convert a unate gate network (UGN) to a more general balanced inversion parity (BIP) network. Circuit classes of interest are discussed in detail. We prove that De Morgan and re-substitution transformations are test-set preserving for path delay faults. Using the results of this paper, we can easily show that a high-level test set for a function z that detects all path delay faults in any UGN realizing z also detects all path delay faults in any BIP realization of z.

News Magazine

  • Korean Bakers Association
    • 베이커리
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    • 12호통권377호
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    • pp.121-143
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    • 1999
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