Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Path Delay Test-Set Preservation of De Morgan and Re-Substitution Transformations

드모르간 및 재대입 변환의 경로지연고장 테스트집합 유지

  • 이준환 (광운대학교 컴퓨터공학과) ;
  • 이현석 (광운대학교 전자통신공학과)
  • Published : 2010.02.25
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Abstract

Two logic transformations, De Morgan and re-substitution, are sufficient to convert a unate gate network (UGN) to a more general balanced inversion parity (BIP) network. Circuit classes of interest are discussed in detail. We prove that De Morgan and re-substitution transformations are test-set preserving for path delay faults. Using the results of this paper, we can easily show that a high-level test set for a function z that detects all path delay faults in any UGN realizing z also detects all path delay faults in any BIP realization of z.

드모르간 및 재대입 논리변환은 unate gate network (UGN)을 보다 일반적인 balanced inversion parity (BIP) network으로 전환하는데 충분하다. 이러한 회로계층에 대해서도 자세히 논의하고 있다. 우리는 드모르간 및 재대입 논리변환이 경로지연고장 테스트집합을 유지한다는 것을 증명하였다. 본 논문의 결과를 이용하여 함수 z를 구현하는 모든 UGN에서 모든 경로지연고장을 검출하는 상위수준 테스트집합은 함수 z의 어떠한 BIP realization에서도 모든 경로지연고장을 검출한다는 것을 보일 수 있다.

Keywords

References

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