• Journal of the Korean Crystal Growth and Crystal Technology
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• v.1 no.1
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• pp.117-126
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• 1991

Silicon single crystal is the most frequently used materials for the semiconductor device fabrication, The crystal growth techniques have been steadily improving for achieving a greater degree of crystal perfection and large ingot size. This report present the advantages, disadvantages and technical problems of the various crystal pulling technique briefly on the economic impact of productivity. Also, future directions of the pulling technique and process including the economical and quantitative aspects are deal with.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.11a
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• pp.151-151
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• 2003

열화학기상증착법(Thermal-CVD)을 이용하여 SOI(snilicon-on-insulator)기판과 실리콘기판 상에 단결정 3C-SiC 이종박막을 동시에 성장하고, 그 특성을 비교 분석하였다. 결정성 평가로는 X-선 회절(XRD)분석과 Raman 산란 분광분석, 그리고 투과전자현미경을 이용하였고, 잔류 웅력 비교 분석으로는 laser scanning 방법 과 Raman 산란 분광분석의 3C-SiC LO peak의 위치변화, 그리고 X-선 회절분석의 3C-SiC(004) peak의 위치변화를 이용하였다. 그 결과 SOI 기판과 실리콘 기판상에 고품위의 단결정 3C-SiC 박막이 성장됨을 확인하였고, SOI 기판을 사용한 경우 실리콘 기판에 비해 성장된 3C-SiC 이종박막의 잔류 응력이 실제로 감소됨을 확인하였다.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.4
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• pp.49-59
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• 2004

In this paper the automatic diameter control system of the CZ-150 Crystal Grower is proposed in order to achieve a good performance for the industry applications in MEMC Korea. The effectiveness of the design parameters is verified by means of the computer simulations and the proposed controllers showed the better performance than the conventional PD controllers which always have steady-state errors.

• Journal of the Korean Society for Precision Engineering
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• v.16 no.2 s.95
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• pp.60-67
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• 1999

Micro-fabrication techniques such as lithography and LIGA processes usually require large investment and are suitable for mass production. Therefore, there is a need for a new micro-fabrication technique that is flexible and more cost effective. In this paper a novel, economical and flexible method of producing micro-pattern on silicon wafer is presented. This method relies on selective removal of mask by mechanical cutting. Then micro-pattern is produced by chemical etching. V-shaped grooved of about 3 ${\mu}m$ wide and 2 ${\mu}m$ deep has been made on ${SiO_2}m$ coated silicon wafer with this method. This method may be utilized for making microstructures in MEMS application at low cost.

• Journal of the Korean Vacuum Society
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• v.4 no.1
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• pp.104-108
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• 1995

Hall 효과 측정을 이용하여 As+이 주입된 다결정 실리콘의 열처리 조건에 따른 활성화 과정을 연구하였다. 주입된 이온의 농도 분포는 SIMS(Secondary Ion Mass Spectroscopy)와 SUPREMIV 모의 실험으로 조사하였다. 열처리 온도가 증가함에 따라 활성층의 전자 면 농도 증가가 뚜렷이 나타났으며, Hall 이동도의 온도 의존성 측정으로 주입된 도우즈에 따라 이온 주입층의 활성화에 필요한 열처리 온도가 달라져야함을 알 수 있었다. 그리고, 접합 손실전류의 감소는 $800^{\circ}C$(30분)의 열처리에서 현저하게 나타났다.

• Proceedings of the Materials Research Society of Korea Conference
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• 2002.05a
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• pp.111-111
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• 2002

• Proceedings of the Korea Crystallographic Association Conference
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• 2001.05a
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• pp.27-27
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• 2001

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.10a
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• pp.272-272
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• 2003

• Proceedings of the Materials Research Society of Korea Conference
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• 2005.05a
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• pp.249-249
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• 2005

• Proceedings of the Korean Ceranic Society Conference
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• 2002.10a
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• pp.76.1-76
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• 2002