• Title/Summary/Keyword: 다중 링

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Dominance and Performance of Real-time Scheduling Algorithms on Multiprocessors (다중처리기 상의 실시간 스케줄링 알고리즘의 우월 관계 및 성능)

  • Park, Min-Kyu;Han, Sang-Chul;Kim, Hee-Heon;Cho, Seong-Je;Cho, Yoo-Kun
    • Journal of KIISE:Computer Systems and Theory
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    • v.32 no.7
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    • pp.368-376
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    • 2005
  • Multiprocessor architecture becomes increasingly common on real-time systems as computer hardware technology rapidly progresses and the workload of real-time systems increases. However, efficient solutions for many real-time multiprocessor scheduling problems are not known. Hence many researchers apply uniprocessor scheduling algorithms to multiprocessor scheduling or devise new algorithms based on these algorithms. Such algorithms are EDF (Earliest Deadline First), LLF (Least Laxity First), EDF-US[m/(2m-1)], and EDZL (Earliest Deadline Zero Laxity), and comparative studies on them are necessary. In this paper, we show the dominance relation of these algorithms with respect to schedulability, and we prove EDZL strictly dominates EDF. The simulation results show that EDZL has high processor utilization and it causes a small number of preemptions.

A High Speed Hologram Generation Method Using Scheduling of Multi-GPGPU and Multi-Processor (다중 프로세서와 다중 GPGPU의 스케줄링을 이용한 고속 홀로그램 생성 방법)

  • Lee, Yoon-Hyuk;Seo, Young-Ho;Kim, Dong-Wook
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2017.06a
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    • pp.213-214
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    • 2017
  • 홀로그램을 생성하기 위해서 많은 양의 계산을 필요하기 때문에 고속 홀로그램 생성 방법이 필요하다. 본 논문에서는 다중 프로세서와 다중 GPGPU의 스케줄링을 이용하여 고속화 하는 방법을 제안하고 구현하였다. 다중 프로세서를 이용하여 입력과 출력부분을 나누어 동기화 동작을 줄이고, 버퍼를 이용하여 커널과 커널 사이의 대기 시간을 줄일 수 있도록 스케줄링 하였다. nVidia사의 GTX680(Kepler구조) 2개를 이용하여 구현하였을 때, 이전 연구에서 제안한 방법에 비하여 약 70% 정도 계산시간을 줄일 수 있다.

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A Task Scheduling Scheme for Bus-Based Symmetric Multiprocessor Systems (버스 기반의 대칭형 다중프로세서 시스템을 위한 태스크 스케줄링 기법)

  • Kang, Oh-Han;Kim, Si-Gwan
    • The KIPS Transactions:PartA
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    • v.9A no.4
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    • pp.511-518
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    • 2002
  • Symmetric Multiprocessors (SMP) has emerged as an important and cost-effective platform for high performance parallel computing. Scheduling of parallel tasks and communications of SMP is important because the choice of a scheduling discipline can have a significant impact on the performance of the system. In this paper, we present a task duplication based scheduling scheme for bus-based SMP. The proposed scheme pre-allocates network communication resources so as to avoid potential communication conflicts. The performance of the proposed scheme has been observed by comparing the schedule length under various number of processors and the communication cost.

Scheduling based on Fair Queueing in Heterogeneous Multiple Server Systems (이질적 다중서버 시스템에서의 공정큐잉 기반 스케줄링)

  • 박경호;김지혜;이주현;박창윤;민상렬
    • Proceedings of the Korean Information Science Society Conference
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    • 2003.04a
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    • pp.205-207
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    • 2003
  • 하나의 컴퓨터 시스템은 여러 종류의 이질적인 서버들로 구성된 것으로 간주할 수 있다. 본 논문에서는 이질적 다중서버 시스템에서의 프로세스 스케줄링 기법에 대해 연구한다. 스케줄링에서는 서비스의 공정성과 시스템 성능의 두 가지 측면이 고려되어야 한다. 여기에서는 공정성을 위하여 기존의 단일 서버 시스템에서 사용되던 공정 큐잉에 기반한 스케줄링 기법을 제안한다. 또한 각 서버간의 이용률 차이를 감안한 시스템 전체 성능 향상을 위한 방법에 대해서도 고찰한다.

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Delay Determination of Cyclic Delay Diversity for Multi-user Scheduling in OFDMA Systems (OFDMA 시스템의 다중 사용자 스케줄링을 위한 순환지연 다이버시티의 지연값 결정)

  • Rim, Min-Joong;Hur, Seong-Ho;Song, Hyun-Joo;Lim, Dae-Woon;Jeong, Byung-Jang;Noh, Tae-Gyun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.3A
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    • pp.248-255
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    • 2008
  • In an OFDMA system the performance of multi-user scheduling in the frequency domain is affected by the frequency selectivity of the channel. If the channel is too flat in the frequency domain, the multi-user scheduling gain might be degraded. On the contrary, if the frequency selectivity is too high and the magnitude of the frequency response severely fluctuates on the allocation bandwidth, it is also hard to get sufficient scheduling gain. For maximizing the multi-user scheduling gain, a cyclic delay diversity technique can be used to adjust the frequency selectivity of the channel. This paper proposes a method to determine the optimal delay value of cyclic delay diversity according to the allocation bandwidth and the channel characteristics.

An Efficient Duplication Based Scheduling Algorithm for Parallel Processing Systmes (병렬 처리 시스템을 위한 효율적인 복제 중심 스케쥴링 알고리즘)

  • Park, Gyeong-Rin;Chu, Hyeon-Seung
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.8
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    • pp.2050-2059
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    • 1999
  • Multiprocessor scheduling problem has been an important research area for the past decades. The problem is defined as finding an optimal schedule which minimizes the parallel execution time of an application on a target multiprocessor system. Duplication Based Scheduling (DBS) is a relatively new approach for solving multiprocessor scheduling problems. This paper classifies DBS algorithms into two categories according to the task duplication method used. The paper then presents a new DBS algorithm that extracts the strong features of the two categories of DBS algorithms. The simulation study shows that the proposed algorithm achieves considerable performance improvement over existing DBS algorithms with similar time complexity.

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Integrating Deadline with Laxity for Real-time Scheduling in Multiprocessor Systems (다중처리기 시스템에서 데드라인과 여유시간을 통합한 실시간 스케줄링 기법)

  • 조성제
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.11
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    • pp.611-621
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    • 2002
  • For real-time systems, multiprocessor support is indispensable to handle the large number of requests. Existing real-time on-line scheduling algorithms such as Earliest Deadline First Algorithm (EDF) and Least Laxity Algorithm (LLA) may not be suitable for scheduling real-time tasks in multiprocessor systems. Although EDF has low context switching overhead, it suffers from "multiple processor anomalies." LLA has been shown as suboptimal, but has the potential for higher context switching overhead. Earliest Deadline Zero Laxity (EDZL) solved somewhat the problems of those algorithms, however is suboptimal for only two processors. Another algorithm EDA2 shows very good performance in overload phase, however, is not suboptimal for muitiprocessors. We propose two on-line scheduling algorithms, Earliest Deadline/Least Laxity (ED/LL) and ED2/LL. ED/LL is suboptimal for multiprocessors, and has low context switching overhead and low deadline miss rate in normal load phase. However, ED/LL is ineffective when the system is overloaded. To solve this problem, ED2/LL uses ED/LL or EDZL in normal load phase and uses EDA2 in overload phase. Experimental results show that ED2/LL achieves good performance in overload phase as wet] as in normal load phase.oad phase.

Multiple Supply Voltage Scheduling Techniques for Minimal Energy Consumption (에너지 소모 최소화를 위한 다중 전압 스케줄링 기법)

  • Jeong, Woo-Sung;Shin, Hyun-Chul
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.9
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    • pp.49-57
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    • 2009
  • In this paper, we propose a multiple voltage scheduling method which reduces energy consumption considering both timing constraints and resource constraints. In the other multiple voltage scheduling techniques, high voltage is assigned to operations in the longest path and low voltage is assigned to operations that are not on the longest path. However, in those methods, voltages are assigned to specific operations restrictively. We use a simulated annealing technique, in which several voltages are assigned to specific operations flexibly regardless of whether they are on the longest path. In this paper, a post processing algorithm is proposed to further reduce the energy consumption. In some cases, designers may want to reduce the level shifters. To make tradeoff between the total energy and the number (or energy) of level shifters weighted term can be added to the cost function. When the level shifter energy is weighted six times, for example, the number of level shifters is reduced by about 24% and their energy consumption is reduced by about 20%.

A Modified Least-Laxity First Scheduling Algorithm for Reducing Context Switches on Multiprocessor Systems (다중 프로세서 시스템에서 문맥교환을 줄이기 위한 변형된 LLF 스케줄링 알고리즘)

  • 오성흔;길아라;양승민
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.2
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    • pp.68-77
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    • 2003
  • The Least-Laxity First(or LLF) scheduling algorithm assigns the highest priority to a task with the least laxity, and has been proved to be optimal for a uni-processor and sub-optimal for a multi-processor. However, this algorithm Is Impractical to implement because laxity tie results in the frequent context switches among tasks. In this paper, a Modified Least-Laxity First on Multiprocessor(or MLLF/MP) scheduling algorithm is proposed to solve this problem, i.e., laxity tie results in the excessive scheduling overheads. The MLLF/MP is based on the LLF, but allows the laxity inversion. MLLF/MP continues executing the current running task as far as other tasks do not miss their deadlines. Consequently, it avoids the frequent context switches. We prove that the MLLF/MP is also sub-optimal in multiprocessor systems. By simulation results, we show that the MLLF/MP has less scheduling overheads than LLF.

Multimode interference coupled ring resonator using half ring and total internal reflection mirrors (반 링과 전반사 미러를 이용한 다중모드 간섭기로 결합된 링 공진기)

  • Kim, Doo-Gun;Choi, Young-Wan
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.2
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    • pp.46-54
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    • 2007
  • We have fabricated and characterized MMI (Multimode Interference) coupled ring resonator with the total internal reflection mirrors and the semiconductor optical amplifier for the integration of the WDM (Wavelength Division Multiplexing) system. The TIR (Total Internal Reflection) mirrors were fabricated by self-aligned process and had losses of about 0.71 dB per mirror. Coupling in and out of a resonator was achieved using the extremely small MMI couplers. The MMI length and width used in the experiment were $119{\mu}m$ and $9{\mu}m$, respectively. The resulting FSR (Free Spectral Range) and on-off ratio were approximately 1.333 nm (162 GHz) and 13 dB, respectively.