• Title/Summary/Keyword: 다단계 상호연결망

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An Efficient Multicasting Algorithm and Its Performance Evaluation in Multistage Interconnection Networks (다단계 상호연결망에서 효율적인 멀티캐스팅 알고리즘과 성능 평가)

  • Kim, Jin-Soo;Chang, Jung-Hwan
    • The Journal of the Korea Contents Association
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    • v.6 no.2
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    • pp.84-92
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    • 2006
  • In this paper, we propose an efficient multicasting algorithm in multistage interconnection networks (MIN's) employing the region encoding scheme. The proposed algorithm uses the recursive scheme to recycle a multicast message at most two times through MIN, in order to send it to its desired destinations. It is composed of two recycling phases which are the copying phase and the routing phase of the multicast message. In the first phase, a source sends the message to a region that contains the largest number of destination regions, and destinations in these regions receive and store the message in this phase. The remaining destinations can finally receive the message in the second phase. This method of the algorithm can improve its performance by reducing the delay of message and the volume of traffic. Moreover, we evaluate the performance of our algorithm in terms of the average number of recycling and the number of internal links used per destination, comparing with the previously proposed algorithm.

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An Input-Buffered Dual-Banyan Switch with Multiple Switching Fabrics Based on Multistage Interconnection Networks (다단계 상호 연결망 기반의 다중 스위치 구조를 갖는 입력 버퍼형 이중 반얀 스위치)

  • Park, Sung-Won;Lee, Chang-Bum
    • The KIPS Transactions:PartC
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    • v.10C no.4
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    • pp.463-470
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    • 2003
  • Many types of switching fabrics have been proposed for use in ATM networks. Multistage Interconnection Networks (MINs) constitute a large class of ATM switching systems that are widely used in today´s internetworking. One of the most veil-known types of multistage networks is the banyan network. The banyan network is attractive for its simple routing scheme and low hardware complexity, but its throughput is very limited due to internal blocking and output contention. In this paper, we propose an input-buffered dual-banyan switch model with multiple switching fabric between switch input and output to avoid internal and Head-of Line blocking. By performance analysis and simulation, we show that our model has a lower ceil delay and 96% throughput which is much better than other banyan-type switch architecture.

Biased Multistage Inter connection Network in Multiprocessor System (다중프로세서 시스템에서 편향된 다단계 상호연결망)

  • Choi, Chang-Hoon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.4
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    • pp.1889-1896
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    • 2011
  • There has been a lot of researches to develop techniques that provide redundant paths, there by making Multistage Interconnection Networks(MINs) fault tolerant. So far, the redundant paths in MINs have been realized by adding additional hardware such as extra stages or duplicated data links. This paper presents a new MIN topology called Hierarchical MIN. The proposed MIN is constructed with 2.5N-4 switching elements, which are much fewer than that of the classical MINs. Even though there are fewer hardware than the classical MINs, the HMIN possesses the property of full access and also provides alternative paths for the fault tolerant. Furthermore, since there is the short cut in HMIN for the localized communication, it takes advantage of exploiting the locality of reference in multiprocessor systems. Its performance under varying degrees of localized communication is analysed and simulated.

Design and Analysis of an Efficient Distributed Routing Algorithm in Multistage Interconnection Networks (다단계 상호 연결망에서의 효율적인 분산 라우팅 알고리듬의 설계 및 분석)

  • 손유익;안광선
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.11
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    • pp.1794-1803
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    • 1989
  • This paper presents and evaluates a distributed routing algorithm for effective routing control in circuit-switched multistage interconnection networks. The proposed method uses the distributed control based on the incividual-switching element control and it is very effective for allowing any broadcast connection from a source to arbitrary number of destinadtions. The performnace of the proposed method is analyzed and evaluated by computer simulation in terms of the normalized average time delays.

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A Study on The Efficient Multicast Algorithm of Wormhole Routing Method in Multistage Networks (다단계 네트워크에서 웜홀 라우팅 방식의 효율적인 멀티캐스트 알고리즘 연구)

  • 김소은;김창수;최계현
    • Journal of Korea Multimedia Society
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    • v.2 no.2
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    • pp.184-194
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    • 1999
  • We present a new algorithm to minimize channel contention while sending multiple messages from multiple source to overlapped destination set on Multistage Interconnection Network (MIN) which supports wormhole routed turnaround routing. The multicast tree of the U-MIN(Unicast MIN) algorithm is useful in performing messages from one source to multiple destination but gives rise to a serious channel connection in performing multiple multicast because it has been designed for only single multicast. For multiple multicast communication on MIN, we address how to implement multiple multicast services efficiently. And a SPU-MIN(Source Partitioned Unicast MIN) algorithm is proposed and shown to be superior than the U-MIN algorithm for multiple multicast. The turnaround routing algorithm based on wormhole routing technique is employed as a message sending method.

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Building and Analysis of Semantic Network on S&T Multilingual Terminology (과학기술 전문용어의 다국어 의미망 생성과 분석)

  • Jeong, Do-Heon;Choi, Hee-Yoon
    • Journal of Information Management
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    • v.37 no.4
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    • pp.25-47
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    • 2006
  • A terminology system capable of providing interpretations and classification information on a multilingual science and technology(S&T) terminology is essential to establish an integrated search environment for multilingual S&T information systems. This paper aims to build a base system to manage an integrated information system for multilingual S&T terminology search. It introduces a method to build a search system for S&T terminologies internally linked through the multilingual semantic network and a search technique on the multiple linked nodes. In order to provide a foundation for further analysis researches, it also attempts to suggest a basic approach to interpret terminology clusters generated with those two search methods.

Adaptive Fault-tolerant Multistage Interconnection Network (적응적 결함-허용 다단계 상호연결망)

  • 김금호;김영만;배은호;윤성대
    • Proceedings of the IEEK Conference
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    • 2001.06c
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    • pp.199-202
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    • 2001
  • In this paper, we proposed and analyzed a new class of irregular fault-tolerant multistage interconnection network named as Extended-QT(Quad Tree) network. E-QT network is extended QT network. A unique path MIN usually is low hardware complexity and control algorithm. So we proposes a class of multipath MIN which are obtained by adding self-loop auxiliary links at the a1l stages in QT(Quad Tree) networks so that they can provide more paths between each source-destination pair. The routing of proposed structure is adaptived and is based by a routing tag. Starting with the routing tag for the minimum path between a given source-destination pair, routing algorithm uses a set of rules to select switches and modify routing tag. Trying the self-loop auxiliary link when both of the output links are unavailable. If the trying is failure, the packet discard. In simulation, an index of performance called reliability and cost are introduced to compare different kinds of MINs. As a result, the prouosed MINs have better capacity than 07 networks.

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Cost-effective multistage interconnection network for UNMA model system (NUMA(non-uniform memory access) 모델 시스템을 위한 cost-effective한 다단계 상호연결망)

  • 최창훈;김성천
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.5
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    • pp.19-32
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    • 1997
  • So far, the multiple path MINs to provide redundant paths in the traditional UPP MINs have been realized by adding additional hardware such as extra stages, duplicated data links, or multiple copies of sthe MIN. And the traditional MINs do not exploit locality: communication with all processor-memory paris takes the same amount of time. Also so far there has been little progress for exploiting locality of reference in MINs. In this paper, we present a new topology MIN, hybrid MIN that is constructed with 2N-3 SEs which is far fewer SEs than that of traditional MINs. Although the hybrid MIN is constructed with 2N-3 SEs, the hybrid MIN satisfies full access capability (FAC) and has redundant paths(but providing single path for 2 memory modules of each processor). Moreover the has redundant paths (but providing single path for 2 memory modules of each processor). Moreover the Hybrid MIN provides shortcut path between pairs which have frequent dat acommunication (locality of reference). Its performance under varing degrees of localized communication is analyzed.

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Two-phase Multicast in Wormhole-switched Bidirectional Banyan Networks (웜홀 스위칭하는 양방향 베니언 망에서의 두 단계 멀티캐스트)

  • Kwon, Wi-Nam;Kwon, Bo-Seob;Park, Jae-Hyung;Yun, Hyeon-Su
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.3
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    • pp.255-263
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    • 2000
  • A multistage interconnection network is a suitable class of interconnection architecture for constructing large-scale multicomputers. Broadcast and multicast communication are fundamental in supporting collective communication operations such as reduction and barrier synchronization. In this paper, we propose a new multicast technique in wormhole-switched bidirectional multistage banyan networks for constructing large-scale multicomputers. To efficiently support broadcast and multicast with simple additional hardware without deadlock, we propose a two-phase multicast algorithm which takes only two transmissions to perform a broadcast and a multicast to an arbitrary number of desired destinations. We encode a header as a cube and adopt the most upper input link first scheme with periodic priority rotation as arbitration mechanism on contented output links. We coalesce the desired destination addresses into multiple number of cubes. And then, we evaluate the performance of the proposed algorithm by simulation. The proposed two-phase multicast algorithm makes a significant improvement in terms of latency. It is noticeable that the two-phase algorithm keeps broadcast latency as efficient as the multicast latency of fanout 2^m where m is the minimum integer satisfying $2^m{\geq} {\sqrt{N}}$ ( N is a network size).

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Design of ATM Switch-based on a Priority Control Algorithm (우선순위 알고리즘을 적용한 상호연결 망 구조의 ATM 스위치 설계)

  • Cho Tae-Kyung;Cho Dong-Uook;Park Byoung-Soo
    • The Journal of the Korea Contents Association
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    • v.4 no.4
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    • pp.189-196
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    • 2004
  • Most of the recent researches for ATM switches have been based on multistage interconnection network known as regularity and self-routing property. These networks can switch packets simultaneously and in parallel. However, they are blocking networks in the sense that packet is capable of collision with each other Mainly Banyan network have been used for structure. There are several ways to reduce the blocking or to increase the throughput of banyan-type switches: increasing the internal link speeds, placing buffers in each switching node, using multiple path, distributing the load evenly in front of the banyan network and so on. Therefore, this paper proposes the use of recirculating shuffle-exchange network to reduce the blocking and to improve hardware complexity. This structures are recirculating shuffle-exchange network as simplified in hardware complexity and Rank network with tree structure which send only a packet with highest priority to the next network, and recirculate the others to the previous network. after it decides priority number on the Packets transferred to the same destination, The transferred Packets into banyan network use the function of self routing through decomposition and composition algorithm and all they arrive at final destinations. To analyze throughput, waiting time and packet loss ratio according to the size of buffer, the probabilities are modeled by a binomial distribution of packet arrival. If it is 50 percentage of load, the size of buffer is more than 15. It means the acceptable packet loss ratio. Therefore, this paper simplify the hardware complexity as use of recirculating shuffle-exchange network instead of bitonic sorter.

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