• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1111-1116
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• 2011

In this paper, a 60 GHz bidirectional active phase shifter with 130 nm CMOS is presented by replacing CMOS passive switchs in switched-line type phase shifter with Common Gate Amplifier(bidirectional amplifier). Bidirectional active phase shifter is composed of bidirectional amplifier blocks and passive delay line network blocks. The suitable topology of bidirectional amplifier block is CGA(Common Gate Amplifier) topology and matching circuits of input and output are symmetrical due to design same characteristic of it's forward and reverse way. The direction(forward and reverse way) and amplitude of amplification can be controlled by only one bias voltage($V_{DS}$) using combination bias circuit. And passive delay line network blocks are composed of microstrip line. An 1-bit phase shifter is fabricated by Dongbu HiTek 1P8M 130-nm CMOS technology and simulation results present -3 dB average insertion loss and respectively 90 degree and 180 degree phase shift at 60 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.10
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• pp.1025-1033
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• 2002

This paper presents temperature-compensation circuits of Ku-band amplifiers for satellite payload. After carefully investigating design specifications of Ku-band amplifiers for satellite payload, we designed three types or temperature-compensation circuits, which are an active bias circuit, an attenuator control, and an ALC loop circuit. Our design technique demonstrates good agreement between measured and predicted results. These temperature-compensation circuits are suitable for Ku-band satellite payload active components, such as channel amplifiers, LNA and IF amplifiers.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.1
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• pp.166-172
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• 2001

A RF wideband receiver for INMARSAT-B satellite communications system was composed of low noise amplifier and high gain amplifier, The low noise amplifier used to the resistive decoupling circuit for input impedance matching and self-bias circuits for low noise. The high gain amplifier consists of matched amplifier type to improve receiver gain. The active bias circuit can be used to provide temperature stability without requiring the large voltage drop or relatively high-dissipated power needed with a bias stabilization resistor. The bandpass filter was used to reduce a spurious level. As a result, the characteristics of the receiver implemented here show more than 60 dB in gain and less than 1.8:1 in input and output voltage standing wave ratio(VSWR), especially the carrier to noise ratio which is input signal level -126.7 dB m at 1537.5 MHz is a 45.23 dB /Hz at a 1.02 kHz.

• 한국정보통신설비학회:학술대회논문집
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• 2002.08a
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• pp.35-38
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• 2002

본 논문에서는 5.8GHz 대역 무선 랜과 차세대 이동통신서비스인 IMT-2000 양 대역에서 동작하는 이중대역 전력증폭기 선계 및 제작에 관하여 기술하였다. 최종 출력목표는 1W이며, 2GHz와 5GHz의 이중밴드로 동작하기 위해 2개의 능동소자를 사용하여, 2개의 독립적인 증폭기를 제작한 후 바이어스 제어회로를 통하여 두 대역을 결합시켰다. 바이어스 제어회로에서 모드 제어 전압 $V_m$의 전압변화에 따라 양 모드간의 변환이 이루어진다.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.755-758
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• 2003

본 논문에서 단거리전용통신(DSRC)용 OBE에 사용되는 5.8GHz 송신측 ASK와 PA를 one-chip화하여 MMIC로 설계를 및 제작하였다. 설계된 ASK-PA는 3V 단일 공급전원을 사용하였고, 능동 소자로서 GaAs MESFET을 사용하였다. ASK는 회로의 복잡도를 줄이기 위해 직접변조 방식을 채택하였고, 인접채널 간섭의 영향을 줄이기 위하여 드레인 제어 변조회로를 사용하였다. 또한 전력증폭기는 2단으로 하여 AB급으로 동작하도록 전압분배 바이어스회로로 구성하였다. 측정결과 3V의 공급전압에서 전체이득 20.63dB, 송신출력 7.8dBm으로 나타냈다. 공정은 ETRI 0.5㎛ GaAs MESFET 공정을 사용하였고, Chip size는 1.2mm×l.4mm이다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.3
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• pp.445-453
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• 2000

In this paper, the method of designing an active inductor for MMIC is proposed. The proposed tunable active inductor is composed of a cascade FET with feedback capacitors and resistors. Because of a very low series resistance in the proposed inductor, a very high Q factor can be obtained. Also it has an excellent characteristics suitable for high frequency band. The inductance value can be changed by controlling feedback capacitors, resistors and a bias voltage respectively. When the feedback resistor and parallel resistor within circuits are varied, the inductance value is changed from 0.2 nH to 1.7 nH in the range 1 to 15 GHz. Also we designed bandpass filter using the proposed active inductor and it shows the insertion loss of 0.4 dB and return loss, 20 dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.8 s.111
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• pp.732-738
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• 2006

Divide-by-2 and divide-by-4 circuits which can operate up to 10 GHz are designed. A design method used in these circuits is the TSPC(True Single Phase Clocking) topology. The structure of the TSPC dividers is very simple because they need only a single clock and purely consist of smalt sized cmos devices. Through measurements, we find the fact that in proportion to the bias voltage, the free running frequency increases and the operation region also moves toward a higher frequency region. For operating conditions of bias voltage $3.0{\sim}4.0V$, input power 16dBm and dcoffset $1.5{\sim}2.0V$, 5 GHz and 2.5 GHz output signals divided by 2 and 4 are measured. The layout size of the divide-by-2 circuit is about $500{\times}500 um^2$($50{\times}40um^2$ except pad interconnection part).

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1137-1140
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• 2011

In this paper, the optimal condition for efficient active frequency multipliers is analyzed. This analysis is based on the effects from transistor nonlinear coefficients, harmonic impedances, and output parasitic components. From the analysis, normalized harmonic power is estimated with the clipping condition of a commercial transistor, and the condition for high conversion efficiency is suggested. From the analysis, a class-F frequency tripler was implemented for the output at 2.475 GHz, showing the maximum efficiency of 22.9 % and the maximum conversion gain of 9.5 dB.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.8
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• pp.549-554
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• 2003

In this paper, we have designed and implemented by a monolithic microwave integrated circuit(MMIC) of a 5.8GHz-band low noise amplifier (LNA) composed of receiver front-end(RFE) in a on-board equipment system for dedicated short range communication. The designed LNA is provided with two active devices, matching circuits, and two drain bias circuits. Operating at a single supply of 3V and a consumption current of 18mA, The gain at center frequency 5.8GHz is 13.4dB, NF is 1.94dB, Input IP3 is -3dBm, S$_{11}$ is -18dB, and S$_{22}$ is -13.3dB. The circuit size is 1.2 $\times$ 0.7 $\textrm{mm}^2$.>.

• Proceedings of the Korea Information Processing Society Conference
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• 2005.05a
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• pp.431-434
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• 2005

근원데이터나, 이원데이터를 이용한 문제를 해결하기 위해서는 많은 경우에 완전 해를 갖는 문제로 변형시키기 위해 정규화할 필요성이 있다. 본 논문에서는 이러한 정규화 인수를 찾는 문제를 기존의 GCV, L-Curve, 그리고 이원데이터를 RBF 신경회로망에 적용시킨 커널 학습법에 대한 각각의 성능을 비교실험을 통해 고찰한다. 이때 커널을 이용한 학습법의 성능을 향상하기 위해, 전체학습과 성능의 제한적 비례관계라는 설정아래, 각각의 학습에 따라 능동적으로 변화하는 동적모멘텀의 도입을 제안한다. 끝으로 제안된 동적모멘텀이 분류문제의 표준인 Iris 데이터, Singular 시스템의 대표적 모델인 가우시안 데이터, 그리고 마지막으로 1차원 이미지 복구문제인 Shaw데이터를 이용한 각각의 실험에서 분류문제와 회계문제 양쪽 모두에 있어 기존의 GCV, L-Curve와 동등하거나 우수한 성능이 있음을 보인다.