• Title/Summary/Keyword: 내장 시스템

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Pattern Analysis of Volatile Components for Domestic and Imported Cnidium officinale Using GC Based on SAW Sensor (SAW센서를 바탕으로한 GC를 이용한 국내산 및 수입산 천궁의 향기 패턴분석)

  • Oh, Se-Yeon;Noh, Bong-Soo
    • Korean Journal of Food Science and Technology
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    • v.35 no.5
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    • pp.994-997
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    • 2003
  • Domestic and imported Cnidium officinale were investigated using GC based on a SAW sensor. Volatile components from the herb were detected by GC with a Surface Acoustic Wave (SAW sensor without any pretreatment. This system produced a frequency proportional to the amount of column effluent deposited on the SAW sensor. It could discriminate between domestic and imported Cnidium officinales. This was achieved by using a pattern recognition and a visual pattern called a $VaporPrint^{TM}$, derived from the frequency and chromatogram of the GC-SAW sensor. The origins of Cnidium officinale was well discriminated with the direct use of $VaporPrint^{TM}$.

Pattern Analysis of Volatile Components for Domestic and Imported Angelica gigas Nakai Using GC Based on SAW Sensor (SAW센서를 바탕으로한 GC를 이용한 국내산 및 수입산 당귀의 향기 패턴분석)

  • Noh, Bong-Soo;Oh, Se-Yeon;Kim, Su-Jeong
    • Korean Journal of Food Science and Technology
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    • v.35 no.1
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    • pp.144-148
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    • 2003
  • Volatile components were detected from domestic and imported Angelica gigas Nakai without any pretreatment using GC based on Surface Acoustic Wave (SAW) sensor. This system produced a frequency proportional to the amount of column effluent deposited on the SAW sensor. Discrimination between domestic and imported Angelica gigas Nakai was achieved through recognition of visual pattern using $VaporPrint^{TM}$ derived from frequency and chromatogram of GC-SAW sensor.

The Embedded 8V-to-12V CMOS DC-DC Converter for a Mobile Battery-Powered System (휴대용 배터리 구동 시스템을 위한 8V-12V 내장형 CMOS DC-DC 컨버터)

  • Oh, Won-Seok;Lee, Seung-Eun;Lee, Sung-Chul;Park, Jin;Choi, Jong-Chan
    • Proceedings of the KIEE Conference
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    • 2002.07d
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    • pp.2577-2579
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    • 2002
  • In this paper, we describe a CMOS DC-DC converter with a variable output voltage(8-12V @100mA) for a portable battery-operated system applications. The proposed DC-DC converter is used along with a Pulse-Frequency Modulation (PFM) method and consists of a reference circuit, a feedback resistor, a controller, and an internal oscillator. The integrated DC-DC converter with two external passive components(L.C) has been designed and fabricated on a 0.6${\mu}m$ 2-poly, 3-metal CMOS process and could be applied to the Personal Digital Assistants(PDA), Cellular Phone, Laptop Computer, etc.

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Sound Watermarking Technique based on Blackfin Processor (블랙핀 프로세서 기반의 사운드 워터마킹 기법)

  • Kim, Ye-il;Seo, Jung-hee;Park, Hung-bog
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.757-758
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    • 2015
  • The digital watermark is one of important techniques to solve copyright authentication problems of digital media. Researches on the digital watermark are rapidly increasing in various media. The watermark system can resist some attacks such as signal attack, geometric attack and protocol attach. However, so far the robustness of the watermark needs to be improved. This paper suggests a watermarking technique with which a watermark is embedded on a coefficient of wavelet-based frequency band and extracted from it for protection of property rights and authentication of Blackfin processor-based digital sound. By carrying out hardware implementation of the suggested sound watermarking, the commercialization of protection of property rights and robustness of watermarks resulted from development of high-level programs can be confirmed.

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An Implementation of a Thinning Algorithm using FPGA (세선화 알고리즘의 FPGA 구현)

  • Jung, Seung-Min;Yeo, Hyeop-Goo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.719-721
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    • 2013
  • A thinning stage of fingerprint algorithm occupies 39% cycle of microprocessor system for identification processing of image from fingerprint sensor. Hardware block processing is more effective than software one in speed and power consumption, because a thinning algorithm is iteration of simple instructions without a transcendental function. This paper describes an effective hardware scheme for thinning stage processing using Verilog-HDL in $64{\times}64$ Pixel Array. The hardware scheme is designed and simulated in RTL. The logic is also synthesized by XST in FPGA environment and tested. Experimental results show the performance of the proposed scheme and possibility of application for a soft microprocessor and thinning processor embedded fingerprint SoC.

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The Design of Multi Channel Receiver for Radar Systems (레이더용 다중채널수신기 설계)

  • Lee, Ki-Hong;Kim, Wan-Sik;Kim, Gye-Kuk
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2010.07a
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    • pp.203-207
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    • 2010
  • In this paper, The design and implementation of Multi Channel Receiver is described in this paper. This Receiver system operates at X-band with processing received signal, more than 80[dB] dynamic range and wide-band signals at the same time. To process direct received signals, this system has the built-in Digital De-modulators which offer the minimum loss on the receiving signal pass and has high stability by adding Built-In Test (BIT). The performance of Multi Receiver is the following. The gain, noise figure, difference of amplitude and phase on the signal pass is respectively $14{\pm}2[dB]$, 19[dB], ${\pm}2[dB]$, and $10^{\circ}$ below.

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Design of the Asynchronous Quasi Dual-port SRAM Based on a Single-port Structure (싱글포트 구조에 기반한 어싱크로네스 의사 듀얼 포트 SRAM 설계)

  • 최정희;손기정;김성식;조경록
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.10
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    • pp.23-29
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    • 2004
  • In this paper, the asynchronous quasi dual-port SRAM employing a single port structure in SRAM embedded SOC (System On Chip) is proposed. External host can access the internal SRAM freely and the data on internal SRAM can be transferred to an another external circuitry without a synchronous signal of an external host, which operates as an asynchronous dual-port SRRAH The performances of the proposed circuits and control structure are verified through the simulation and we fabricated it using a 0.35um CMOS technology. As the results, the chip shows reduced area about 20% and saved power also 20% than conventional architectures.

On the Analytical Model of Automotive Steering Hoses Containing Tuner and Its Practical Application (튜너 내장 자동차 조향호스의 해석 모델과 실용적 응용)

  • Lee, J.C.;Oh, S.H.
    • Transactions of The Korea Fluid Power Systems Society
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    • v.6 no.1
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    • pp.1-9
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    • 2009
  • This study presents an analytical model of an automotive steering hose containing tuner(flexible spiral metal tube) to reduce the ripple pressure induced by steering vane pump. The double-wall side branch composed in a steering hose containing tuner was analogically considered as a filter in a conduit. Specialized test equipment was manufactured for the estimation of speed of sound in a conduit and measurement of amplitude ratio between the propagated ripple pressures of inlet and outlet of the steering hose. Experimental data of entire frequency ranges can be obtained through the test once in short time. The results of three points' measurement method and cross-correlation method to estimate the speeds of sound in a hose, tuner, and side branch respectively reveal that cross-correlation method can be used practically. The results of simulation and experiment were so close, especially in the range of engine idling speed, that the proposed analytical model in this study was validated. Sensitivity analyses and experiments show that longer tuner is preferable, and that the positive-positive composition of the steering hoses containing tuner is superior to others to attenuate ripple pressure.

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CPW-fed Quasi-Yagi Antenna for UHF RFID and GPS Bands (코플래너 도파관으로 급전되는 UHF RFID 및 GPS 대역용 준-야기 안테나)

  • Lee, Jong-Ig;Kim, Gun-Kyun;Yeo, Junho
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.05a
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    • pp.63-64
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    • 2017
  • In this paper, we studied a design method for a coplanar waveguide-fed compact quasi-Yagi antenna for a dual band of the UHF RFID (915 MHz) and GPS (1.575 GHz). The proposed antenna is composed of three elements of a dipole, a reflector, and a director. To reduce its size, the ends of both the dipole and reflector are bent, the director is placed near to the dipole, and a balun is incorporated in the antenna. From some simulations, the proposed antenna using an FR4 substrate with 0.8 mm thickness was designed for the operations in the UHF RFID and GPS systems, and the antenna characteristics such as reflection coefficient, gain, and radiation patterns were examined.

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A Study on Reliability Improvement of Avionics Equipment (항공전자 장비 신뢰도 향상 방안 연구)

  • Seo, Joon-Ho;Kim, Young-Kil
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.05a
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    • pp.383-386
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    • 2017
  • Avionics, a type of embedded system, requires high safety and reliability. Failure of avionics equipment can have a significant impact on aircraft operations and, in the worst case, could result in loss of life for pilots and passengers. In this paper, we propose a Built-In-Test (hereafter referred to as BIT) design technique that can detect possible faults in avionics equipments in order to increase the reliability of avionics system and a design that can improve the Mean Time Between Failure (hereafter: MTBF) and applied it to real aviation electronic equipment to improve reliability.

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