• Title/Summary/Keyword: 근사연산

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An efficient fixed-point implementation of the IMDCT for audio compression (오디오 압축을 위한 IMDCT의 최적 DSP 근사구현 기법 연구)

  • Jeong, J.H.;Chang, T.G.;Son, Y.K.;Lee, J.W.
    • Proceedings of the KIEE Conference
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    • 2001.07d
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    • pp.2513-2515
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    • 2001
  • 본 논문에서는 유한비트 근사화를 통하여 고정소수점 연산을 이용하여 DCT구현시 발생하는 오차 영향에 대한 해석을 수행하였다. 고정소수점 연산을 위해서는 유한 비트 근사화를 실시하여야 하는데 이 과정에서 수치 표현범위의 제약으로 인한 오차가 발생하게 되고, 특히 순환 연산구조를 가지는 DCT등의 알고리즘 구현시 급격한 성능의 감소를 가져오게 된다. 본 논문에서는 순환 연산식을 유한비트 근사화를 통하여 구현시 발생되는 에러에 대한 분석을 수행하고, 해석식을 도출하였다.

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Intermediate Data Guided Approximation for Fast and Accurate Encrypted Neural Networks (빠르고 정확한 암호화된 신경망 연산을 위한 중간 데이터를 활용한 근사식 생성 기술)

  • Kevin Nam;Youyeon Joo;Seungjin Ha;Yunheung Paek
    • Annual Conference of KIPS
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    • 2024.10a
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    • pp.338-341
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    • 2024
  • 동형암호는 프라이버시 보존형 신경망 연산을 가능캐한다. 하지만 동형암호는 비산술연산을 직접 연산하지 못해 근사식을 활용하는데, 신경망 정확도 하락을 일으킨다. 이를 극복하기 위해 재학습, Neural Architecture Search 등 방법들이 등장했지만, 큰 소요시간을 필요로 한다. 본 연구는 이 둘보다 빠르면서도 정확도 하락을 적게 일으키는 중간값 유도 근사식 생성 기술을 제안한다.

High Precision Logarithm Converters for Binary Floating Point Approximation Operations (고속 부동소수점 근사연산용 로그변환 회로)

  • Moon, Sang-Ook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.809-811
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    • 2010
  • In most floating-point operations related with 3D graphic applications for mobile devices, properly approximated data calculations with reduced complexity and low power are preferable to exactly rounded floating-point operations with unnecessary preciseness with cost. Among all the sophisticated floating-point arithmetic operations, multiplication and division are the most complicated and time-consuming, and they can be transformed into addition and subtraction repectively by adopting the logarithmic conversion. In this process, the most important factor for performance is how high we can make an approximation of the logarithm conversion. In this paper, we cover the trends in studying the logarithm conversion circuit designs. We also discuss the important factor in design issues and the applicable fields in detail.

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Computational Latency Reduction via Simplified Soft-bit Estimation of Hierarchical Modulation (근사화된 계층 변조의 연판정 비트 검출을 통한 연산 지연시간 감소)

  • You, Dongho
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2022.06a
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    • pp.175-178
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    • 2022
  • 본 논문은 고차 계층 변조, 즉 계층 64QAM의 연판정 비트 검출을 위한 단순화된 연산 방법을 다룬다. 이는 기존 계층 변조의 연판정 비트, 즉 LLR(Log-Likelihood Ratio)값의 근사를 통해 불필요한 연산을 줄여 이에 필요한 지연시간을 줄일 수 있다. 또한 제안된 기법은 기존의 연판정 비트 검출 기법과 매우 유사한 비트 오류율(BER: Bit Error Rate) 성능을 유지하기 때문에 연판정 비트를 활용하는 방송 및 통신 시스템에 폭넓게 적용될 수 있을 것으로 기대한다.

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Precise Max-Pooling on Fully Homomorphic Encryption (완전 동형 암호에서의 정밀한 맥스 풀링 연산)

  • Eunsang Lee
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.33 no.3
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    • pp.375-381
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    • 2023
  • Fully homomorphic encryption enables algebraic operations on encrypted data, and recently, methods for approximating non-algebraic operations such as the maximum function have been studied. However, precise approximation of max-pooling operations for four or more numbers have not been researched yet. In this study, we propose a precise max-pooling approximation method using the composition of approximate polynomials of the maximum function and theoretically analyze its precision. Experimental results show that the proposed approximate max-pooling has a small amortized runtime of less than 1ms and high precision that matches the theoretical analysis.

A Study on the Efficiency of Join Operation On Stream Data Using Sliding Windows (스트림 데이터에서 슬라이딩 윈도우를 사용한 조인 연산의 효율에 관한 연구)

  • Yang, Young-Hyoo
    • Journal of the Korea Society of Computer and Information
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    • v.17 no.2
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    • pp.149-157
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    • 2012
  • In this thesis, the problem of computing approximate answers to continuous sliding-window joins over data streams when the available memory may be insufficient to keep the entire join state. One approximation scenario is to provide a maximum subset of the result, with the objective of losing as few result tuples as possible. An alternative scenario is to provide a random sample of the join result, e.g., if the output of the join is being aggregated. It is shown formally that neither approximation can be addressed effectively for a sliding-window join of arbitrary input streams. Previous work has addressed only the maximum-subset problem, and has implicitly used a frequency based model of stream arrival. There exists a sampling problem for this model. More importantly, it is shown that a broad class of applications for which an age-based model of stream arrival is more appropriate, and both approximation scenarios under this new model are addressed. Finally, for the case of multiple joins being executed with an overall memory constraint, an algorithm for memory allocation across the join that optimizes a combined measure of approximation in all scenarios considered is provided.

Approximate Aggregation and Effective Error Estimation using Histogram (히스토그램을 이용한 근사적 집단 연산과 효과적인 오차 추정)

  • 안성준;배진욱;심마로;이석호
    • Proceedings of the Korean Information Science Society Conference
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    • 1999.10a
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    • pp.18-20
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    • 1999
  • 히스토그램은 데이터베이스 질의 최적기가 사용하는 통게정보 중의 하나이다. 최근에는 데이터베이스의 크기가 기하급수적으로 커짐에 따라, 데이터의 전체적인 성향을 빠르게 파악할 수 있는 방법의 하나로 히스토그램으로 활용하는 방안이 고려되고 있다. 그를 위해서, 히스토그램에서 얻어진 근사값의 오차를 추정할 수 있는 방법이 요구되었다. 기존의 기법에서는 히스토그램의 각 버켓에 실제 빈도와 평균 빈도의 최대차를 추가하고, 이 값을 이용하여 오차추정을 하였다. 그러나, 이 값이 히스토그램 버켓의 전체적인 데이터 분포를 잘 반영하지 못하기 때문에 실제 오차에 근접한 오차 추정을 할 수가 없는 단점이 있었다. 본 논문에서는 이를 극복하기 위해, 히스토그램에 데이터의 분포를 잘 반영하는 정보 즉, 평균값, COUNT/SUM 연산에 대한 최대 오차를 추가하였다. 이 정보들을 이용하여 실제 오차에 보다 근접한 오차 추정을 할 수 있었으며, 부가적으로 SUM/AVG 연산에 대한 보다 정확한 근사값을 얻을 수 있었다.

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Probability distribution-based approximation matrix multiplication simplification algorithm (확률분포 생성을 통한 근사 행렬 곱셈 간소화 방법)

  • Kwon, Oh-Young;Seo, Kyoung-Taek
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.11
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    • pp.1623-1629
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    • 2022
  • Matrix multiplication is a fundamental operation widely used in science and engineering. There is an approximate matrix multiplication method as a way to reduce the amount of computation of matrix multiplication. Approximate matrix multiplication determines an appropriate probability distribution for selecting columns and rows of matrices, and performs approximate matrix multiplication by selecting columns and rows of matrices according to this distribution. Probability distributions are generated by considering both matrices A and B participating in matrix multiplication. In this paper, we propose a method to generate a probability distribution that selects columns and rows of matrices to be used for approximate matrix multiplication, targeting only matrix A. Approximate matrix multiplication was performed on 1000×1000 ~ 5000×5000 matrices using existing and proposed methods. The approximate matrix multiplication applying the proposed method compared to the conventional method has been shown to be closer to the original matrix multiplication result, averaging 0.02% to 2.34%.

Design of Low-Power Approximate Encoder for Data Bus Inversion (데이터 버스 반전 기법을 위한 저전력 근사 인코더 설계)

  • Raein Lee;Yeongkyo Seo
    • Transactions on Semiconductor Engineering
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    • v.2 no.4
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    • pp.78-83
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    • 2024
  • As the integration of multiple systems into a single chip increases, on-chip bus power consumption has become a significant concern, necessitating strategies to reduce it. In contrast, off-chip environments requiring reduced energy consumption on buses primarily utilize the Data Bus Inversion (DBI) technique. DBI is a data encoding method that reduces switching activity, achieving an average reduction of 18.25% in switching activity and effectively lowering total energy consumption in off-chip applications. However, applying conventional DBI on-chip leads to energy overhead issues, highlighting the need for a novel DBI encoder tailored to on-chip environments. This paper proposes an approximate DBI encoder that incorporates approximate computation into the majority voter circuit, a key component of the DBI encoder, to address the energy overhead issue. The DBI technique using the two proposed approximate majority voter circuits reduces average switching activity by 5.75% and 10.50%, respectively. While the approximate computation results in a slight increase in switching activity compared to the conventional DBI, it achieves an average reduction of approximately 20% in delay time and around 56% in power consumption.

An Approximated Model of the Coefficients for Interchannel Interference of OFDM System with Frequency Offset (주파수 오프셋이 있는 OFDM시스템에서 채널간간섭의 간섭계수 근사화 모델)

  • Li, Shuang;Kwon, Hyeock-Chan;Kang, Seog-Geun
    • The Journal of the Korea institute of electronic communication sciences
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    • v.13 no.5
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    • pp.917-922
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    • 2018
  • In the conventional interchannel interference self-cancellation (ICI-SC) schemes, the length of sampling window is the same as the symbol length of orthogonal frequency division multiplexing (OFDM). Thus, the number of complex operations to compute the interference coefficient of each subchannel is significantly increased. To solve this problem, we present an approximated mathematical model for the coefficients of ICI-SC schemes. Based on the proposed approximation, we analyze mean squared error (MSE) and computational complexity of the ICI-SC schemes with the length of sampling window. As a result, the presented approximation has an error of less than 0.01% on the MSE compared to the original equation. When the number of subchannels is 1024, the number of complex computations for the interference coefficients is reduced by 98% or more. Since the computational complexity can be remarkably reduced without sacrificing the self-cancellation capability, it is considered that the proposed approximation is very useful to develop an algorithm for the ICI-SC scheme.