• Journal of the Korean Crystal Growth and Crystal Technology
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• v.24 no.6
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• pp.268-273
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• 2014

$Y_2O_3$ ceramic specimens were fabricated from the granular powder, obtained by spray drying process from the slurry. The slurry was prepared by mixing PVA binder, NaOH for Ph control, PEG and $Y_2O_3$ powder. The $Y_2O_3$ specimen was shaped in size of ${\phi}14mm$ and then sintered at $1650^{\circ}C$. The characteristics, microstructure, densities and plasma resistance of the $Y_2O_3$ specimens were investigated with the function of forming pressure and sintering time. $Y_2O_3$ specimens were exposed under the $CHF_3/O_2/Ar$ plasma, the dry etching treatment of specimens was carried out by the physical reaction etching of $Ar^+$ ion beam and the chemical reaction etching of $F^-$ ion decomposed from $CHF_3$. With increasing sintering time, $Y_2O_3$ specimens showed relatively high density and strong resistance in plasma etching test.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.137-147
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• 2013

In this paper, an 1.2V 8b 1GS/s A/D Converter(ADC) based on a folding architecture with a resistive interpolation technique is described. In order to overcome the asymmetrical boundary-condition error of conventional folding ADCs, a novel scheme with an odd number of folding blocks and a fractional folding rate are proposed. Further, a new digital encoding technique with an arithmetic adder is described to implement the proposed fractional folding technique. The proposed ADC employs an iterating offset self-calibration technique and a digital error correction circuit to minimize device mismatch and external noise The chip has been fabricated with a 1.2V 0.13um 1-poly 6-metal CMOS technology. The effective chip area is $2.1mm^2$ (ADC core : $1.4mm^2$, calibration engine : $0.7mm^2$) and the power dissipation is about 350mW including calibration engine at 1.2V power supply. The measured result of SNDR is 46.22dB, when Fin = 10MHz at Fs = 1GHz. Both the INL and DNL are within 1LSB with the self-calibration circuit.

• Journal of the Korean Ceramic Society
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• v.39 no.5
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• pp.460-466
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• 2002

Titanium oxide film was deposited on the commercially pure titanium (cp-Ti) by thermal oxidation method for its medical application. The cp-Ti disks were cleaned and then heat-treated at the temperatures of 500, 550, 600, 650, and 700${\circ}C$, respectively, for 10 min in air or Ar. To test the ability of calcium phosphate formation, the specimens were immersed in the Eagle's minimum essential medium solution at 36.5${\circ}C$ for 15 days. The morphology and chemical composition of the surfaces before and after soaking were analyzed by using FE-SEM and EDS. The in-vitro formation of carbonated calcium phosphate on the thin films containing nano-sized $TiO_2$ crystals was identified.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.174-174
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• 2008

초음파를 이용하여 액체 연료를 분사하면 균일한 입경과 미립화가 우수하며 에너지 절약과 공해방지등을 할 수 있다. 또한 유속과 유량에 관계없이 이용할 수 있어 반도체 분야의 웨이퍼와 평판 표시기상에 사진 석판용 화학물질의 균일도포 컴퓨터 하드 디스크의 광택제 도포등에 사용할 수 있다. 이처럼 초저의 유출 용량을 요구하는 모든 공정 및 액체연료의 분사가 요구되는 모든 산업에 적용할 수 있는 장점을 가지고 있다. 하지만 현제까지 주로 사용되고 있는 초음파노즐의 액츄에이터는 단판액츄에이터형로 높은 교류전압을 인가해주어야 하는 단점을 가지고 있다. 이 단점을 해결하기 위해 적층액츄에이터형을 사용하여 초음파 노즐 구동하면 낮은 교류 입력전압에서도 단판액츄에이터형 초음파 노즐과 같은 특성을 가질 수 있다. 또한 초음파 노즐의 구동시 기계적인 진동을 이용하므로 많은 열을 발생시켜 노즐의 온도가 상승하여 세라믹 액츄에이터에도 그 영향을 미치게 되어 열적 열화 현상이 일어날 수 있기에 높은 큐리온도를 가지는 액츄에이터가 필요하다. 본 실험에서는 $Pb(Mn_{1/3}Nb_{2/3})_{0.02}(Ni_{1/3}Nb_{2/3})_{0.12}(Zr_{0.50}Ti_{0.50})_{0.86}O_3$ 조성을 사용하여 $900^{\circ}C$의 저온에서 액상 소결하여 적층혈액츄에이터를 제작하였으며 압전 및 유전 특성을 조사하였다. 제작된 초음파노즐을 구동하기 위해서는 약 36kHz의 30V이상의 교류입력전압 할 수 있는 구동회로가 필요로 한다. 압전액츄에이터의 구동을 위해서는 정확한 정현파 입력이 필요 없다. 압전액츄에이터의 특성상 유사 정현파 입력 만으로도 임피던스 매칭이 이루어지기 때문에 설계가 쉽고 간편한 Push-Pull 방식을 이용한 PWM인버터를 사용하였고 인버터의 출력 주파수를 34~38kHz까지 가변 할 수 있게 설계하였다. 제작된 적층액츄에이터형 초음파 노즐을 PWM인버터로 실제 액체 연료인 경유를 분사하였을 때의 액츄에이터의 온도 변화에 따른 공진주파수와 온도 의존성, 전기적 특성을 조사하고 미립화 분사되는 경유의 미립자 크기 및 최대 분사량을 조사 하였다.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.10
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• pp.80-86
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• 2014

A low-noise readout circuit is studied for 2-D capacitive microbolometer focal plane arrays (FPAs). In spite of the merits of the integration method, a simple and effective pixelwise readout circuit without integration is used for input circuit because of a small pixel size and narrow noise bandwidth. To reduce the power consumption and the kT/C noise, which is the dominant noise of the capacitive microbolometer FPAs with small capacitance, a new correlated double sampling (CDS) is used for columnwise circuit. The proposed circuit has been designed using a $0.35-{\mu}m$ 2-poly 4-metal CMOS process for a microbolometer array with a pixel size of $50{\mu}m{\times}50{\mu}m$. The proposed circuit effectively reduces the kT/C noise and the other low-frequency noise of microbolometer, and the noise characteristics of the fabricated chip have been verified by measurements. The rms noise voltage of the proposed circuit is reduced from 30 % to 55 % compared to that of the simple readout input circuit, and the noise equivalent temperature difference (NETD) of the proposed circuit is very low value of 21.5 mK.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.10
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• pp.57-63
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• 2014

This paper proposes an architecture of $3^{rd}$ order SDM(Sigma-Delta Modulator) with delayed feed-forward path in order to reduce the power consumption and area. The proposed SDM improve the architecture of conventional $3^{rd}$ order SDM which consists of two integrators. The proposed architecture can increase the coefficient values of first stage doubly by inserting the delayed feed-forward path. Accordingly, compared with the conventional architecture, the capacitor value($C_I$) of first integrator is reduced by half. Thus, because the load capacitance of first integrator became the half of original value, the output current of first op-amp is reduced as 51% and the capacitance area of first integrator is reduced as 48%. Therefore, the proposed method can optimize the power and the area. The proposed architecture in this paper is simulated under conditions which are supply voltage of 1.8V, input signal 1Vpp/1KHz, signal bandwidth of 24KHz and sampling frequency of 2.8224MHz in the 0.18um CMOS process. The simulation results are SNR(Signal to Noise Ratio) of 88.9dB and ENOB(Effective Number of Bits) of 14-bits. The total power consumption of the proposed SDM is $180{\mu}W$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.9
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• pp.631-637
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• 2003

We have evaluated structural and electric, ferroelectric properties of PZT(30/70) thick film prepared by using 1,3-propanediol based sol-gel method on Pt/Ti/SiO$_2$/Si substrates. Rapid thermal annealing (RTA) is used to reduce the thermal stress and final furnace annealing is processed at $650^{\circ}C$. As the results of SEM analysis, we find that we get 350 nm in thickness for one coating and 1 $\mu$m for three times of coating. In the results of C-D analysis at 1 kHz, dielectric constant ($\varepsilon$$_{r}$) and dissipation factor were 886 and 0.03, respectively. C-V curve is shaped as a symmetrical butterfly. Leakage current density at 200 kV/cm is 1.23${\times}$10$^{-5}$ A/cm$^2$ and in the results of hysteresis loops measured at 150 kV/cm, the remnant polarization (P$_{r}$) and the coercive field (E$_{c}$) are 33.8 $\mu$C/cm$^2$ and 56.9 kV/cm, respectively. PZT(30/70) thick film exhibits relatively good ferroelectric, electric properties.s..

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.9
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• pp.673-684
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• 2003

A degenerated differential pair has been widely used as a standard topology for digitally programmable CMOS VGAs. A variable degeneration resistor has been implemented using a resistor string or R-2R ladder with MOSFET switches. However, in the VGAs using these conventional methods, low-voltage and high-speed operation is very hard to achieve due to the dc voltage drop over the degeneration resistor. To overcome this problem a new variable degeneration resistor is proposed where the dc voltage drop is almost removed. Using the proposed gain control scheme, a low-voltage and high-speed CMOS VGA is designed. HSPICE simulation results using a 0.25${\mu}{\textrm}{m}$ CMOS process parameters show that the designed VGA provides a 3dB bandwidth of 360MHz and a 80dB gain control range in 2dB step. Gain errors are less than 0.4dB at 200MHz and less than l.4dB at 300MHz. The designed circuit consumes 10.8mA from a 2.5V supply and its die area is 1190${\mu}{\textrm}{m}$${\times}$360${\mu}{\textrm}{m}$.

• Journal of Advanced Marine Engineering and Technology
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• v.38 no.9
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• pp.1027-1031
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• 2014

Free cooling system is used to reduce energy consumption of cooling system. Free cooling system is consisted of cooling group and dry-cooler in which heat exchange of chilled water and out air is conducted. Although this system has an excellent energy saving effect in place having cooling load regularly, data or material of design for free cooling system is lacked. In this study, characteristics analysis of free cooling system is conducted through software HYSYS with changing some facts. The main result is following as : Dry-cooler capacity is influenced by out air temperature, required chilled water temperature and LMTD(Logarithmic Mean Temperature Difference) of heat exchanger. As out air temperature is more low, dry-cooler capacity become increased. in addition, as required chilled water temperature is more high and LMTD is more low, the out air temperature range is widened for using dry-cooler. If out air temperature is below $0^{\circ}C$, antifreeze need to be used because freeze and burst can be occurred. In case of South Korea, antifreeze of 34% of ethylene glycol concentration is proper. When compressor load of R22, R134a and R407C is compared, considering environmental regulation and energy consumption, R134a is best working fluid.

• Applied Chemistry for Engineering
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• v.26 no.6
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• pp.730-736
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• 2015

Cyclotrimethylene trinitramine (RDX) is a high explosive commonly used for military applications. Submicronization of RDX particles has been a critical issue in order to alleviate the unintended and accidental stimuli toward safer and more powerful performances. The purpose of this study is to optimize experimental variables for drowning-out crystallization applied to produce submicron RDX particles. Effects of RDX concentration, anti-solvent temperature and anti-solvent mass were analyzed by the central composite rotatable design. The adjusted determination coefficient of regression model was calculated to be 0.9984 having the p-value less than 0.01. Response surface plots based on the central composite rotatable design determined the optimum conditions such as RDX concentration of 3 wt%, anti-solvent temperature of $0.2^{\circ}C$ and anti-solvent mass of 266 g. The optimum and experimental diameters of RDX particles were measured to be $0.53{\mu}m$ and $0.53{\mu}m$, respectively. The regression model satisfactorily predicts the average diameter of RDX particles prepared by drowning-out crystallization. Structure of RDX crystals was found to be ${\alpha}$-form by X-ray diffraction analysis and FT-IR spectroscopy.