• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.49 no.8
• /
• pp.10-15
• /
• 2012

This letter proposes a low-leakage SRAM using power-gating and voltage-level control. The power-gating scheme significantly reduces leakage power by shutting off the power supply to blank memory cell blocks. The voltage-level control scheme saves leakage power by raising the ground line voltage of SRAM cells and word line decoders in data-stored memory cell blocks. A $4K{\times}8bit$ SRAM chip was fabricated using a 1.2V $0.13{\mu}m$ CMOS process. The leakage powers are $1.23{\sim}9.87{\mu}W$ and $1.23{\sim}3.01{\mu}W$ for 0~100% memory usage in active and sleep modes, respectively. During the sleep mode, the proposed SRAM consumes 12.5~30.5% leakage power compared to the conventional SRAM.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.40 no.3
• /
• pp.135-144
• /
• 2003

This work proposes on-chip full CMOS current and voltage references for high-speed mixed-mode circuits. The proposed current reference circuit uses a digital-domain calibration method instead of a conventional analog calibration to obtain accurate current values. The proposed voltage reference employs internal reference voltage drivers to minimize the high-frequency noise from the output stages of high-speed mixed-mode circuits. The reference voltage drivers adopt low power op amps and small- sized on-chip capacitors for low power consumption and small chip area. The proposed references are designed, laid out, and fabricated in a 0.18 um n-well CMOS process and the active chip area is 250 um x 200 um. The measured results show the reference circuits have the power supply variation of 2.59 %/V and the temperature coefficient of 48 ppm/$^{\circ}C$ E.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.12 no.6
• /
• pp.433-440
• /
• 2007

Recently, the reduction of standby power consumption is significantly issued in electronic and electrical industry for the conservation of environment. In the case of a switched mode power supply (SMPS), it is demanded high efficiency at extremely low output power conditions by consumers. However, it is very different from high efficiency techniques at full load conditions. In addition, many SMPSs are designed as a multi-output circuit for various loads because of cost down. This circuit is difficult to implement both high efficiency and good cross regulation performance, simultaneously. In this paper, secondary side post regulator (SSPR), current mode control method, and power sequence control technique are proposed to reduce standby power consumption and to improve cross regulation performance of the multi-output SMPSs which consist of single or multiple converter. The proposed methods are analyzed by their operational principles and optimal designs verified by experimental results with 110[W] and 270[W] SMPSs.

• Journal of the Korean Magnetics Society
• /
• v.9 no.1
• /
• pp.55-63
• /
• 1999

It is necessary to eliminate the broad band noise whose frequency is in the range of several kHz to tens MHz generated from the AC power line to supply the power to electrical and electronic equipments. Because this kind of noise could damage or malfunction such equipments. To suppress those noises, some conventional devices such as a filter or surge suppressor have been used. However, they can not be isolated from the common-mode noise widely spreaded in all power line, which results in poor common-mode rejection performance. In this paper, we proposed a design method of shielded isolation transformer and a jumped circuit analysis model for shielded isolation transformer applicable to filtering common-mode noise as well as normal-mode noise. The analysis model has been verified as a suitable one for shielded isolation transformer through comparison of the simulation with experiment. In addition, it has been shown that the reduction performance for conducted noise of prototype 3 kVA shielded isolation transformer is superior to a unshielded isolation transformer.

• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.33 no.3
• /
• pp.93-98
• /
• 2005

STSAT-2 will be launched on December 2007 by the first Korean launch vehicle KSLV-1, and its one of the main instruments is DREAM (Dual Channel Radio Frequency and Environment Atmosphere Monitoring) which detects a signal for atmosphere from the Earth by using micro-wave signal. The STSAT-2 has many units for technology demonstration such as FDSS (Fine Digital Sun Sensor) and DHST (Dual Head Star Tracker) including PPT (Pulsed Plasma Thruster) for attitude control and momentum dumping in the space. In this paper, the power budget analysis for STSAT-2 will be studied and provided for supporting the whole mission life time during the mission of its spacecraft.

• Journal of IKEEE
• /
• v.8 no.1 s.14
• /
• pp.47-53
• /
• 2004

We present the design of ternary flip-flop which is based on ternary logic so as to process ternary data. These flip-flops are composed with ternary voltage mode NMAX, NMIN, INVERTER gates. These logic gate circuits are designed using CMOS and obtained the characteristics of a lower voltage, lower power consumption as compared to other gates. These circuits have been simulated with the electrical parameters of a standard 0.35um CMOS technology and 3.3Volts supply voltage. The architecture of proposed ternary flip-flop is highly modular and well suited for VLSI implementation, only using ternary gates.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2006.05a
• /
• pp.685-688
• /
• 2006

A single-phase uninterruptible power supply system suitable for a SMES unit is proposed to achieve a simple circuit configuration and higher system reliability. It reduces the number of switching devices by applying a common-arm scheme. Operational principles to normal, stored-energy, and bypass mode are discussed in detail. Eliminating some of the switches or substituting passive components for active switches generally increases the sophistication and reduces degree of freedom in control strategy. However, the high-performance digital controller ran execute the complicated control task with no additional cost. The validity of the proposed UPS system will be verified by a computer-aided simulation.

• Proceedings of the Korean Society of Propulsion Engineers Conference
• /
• 2008.11a
• /
• pp.411-415
• /
• 2008

This paper presents on design factor considered in an altitude test cell facility to determine the best sizing to optimize exhaust diffuser pressure recovery and the exact cooling load required to be supplied under transient operation. Engine simulation was performed to analyse the exhaust gas temperature, exit mass flow rate, specific fuel consumption and exhaust velocity helpful in determining secondary mass air flow and the mixed air temperature entering the ejector. based on this, the amount of cooling load was deduced. It was found that improved pressure recovery reduces operational cost(air supply facility, cooling water).

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.23 no.12
• /
• pp.106-114
• /
• 2009

This paper addresses unit commitment for microgrid optimization including renewable energy sources, working under deregulated power market. As microgrid supplies both heat and electricity for consumer, operational optimization must be done to meet their demand economically. So renewable energy sources are considered to be negative load, and batteries are used as the load flattening device to raise possibly operational function. In the state of solution, the program is developed to solve out the maximum profit of microgrid using dynamic programming method. Finally, its validity is verified through case study in isolation mode and interconnected mode. The S/W will be used to operate microgrid economically after the market of microgrid is formed.

• 한국신재생에너지학회:학술대회논문집
• /
• 2010.11a
• /
• pp.41.1-41.1
• /
• 2010

전기수력학적 분무를 이용한 액적 미립화 기술은 나노사이즈의 액적 형성, 쿨롱 반발력에 의한 균일한 액적 형성, 그리고 향상된 액적 타겟팅을 가능하게 한다. 따라서 이를 이용하여 매우 균일한 박막 코팅이 가능하다. 이러한 점에 힘입어 현재 진공 공정으로 제작되고 있는 CIGS태양전지의 광흡수층을 비진공 공정중 하나인 전기수력학적 미립화를 이용하여 실험하였다. Ethanol-based 의 CIGS나노 입자를 포함하는 콜로이드 상태의 전구체를 이용하여 적절히 가열된 몰리브덴 배면 전극위에 적용하였다. 미립화한 액적은 접지된 몰리브덴 층에 부착되는 즉시 증발하여 CIGS입자를 남긴다. 여기서 가장 중요하게 다루어야 할 조건은 기판의 온도, 인가 전압, 전구체의 유량이다. 분사 모드는 Cone-jet을 적용하였으며 5~15kV의 인가 전압에서 1ml/hr내외의 유량을 공급하여 3분 이내에 적절한 광흡수층 두께인 1마이크론 내외에 도달할 수 있다. 이와같은 조건으로 형성된 박막층에 관한 SEM image를 통해 다른 비진공 코팅 방식과 비교하였다.