• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.34 no.7
• /
• pp.35-44
• /
• 2006

When control surface failure occurs, it is conventional to correct a current control or to transform to other control. In this paper, instead of adopting a conventional way, a reconfiguration method which compensate the failure with alternative control surface deflection, depending on the level of failure, by using neural network and PCH(Pseudo-Control Hedging). The Conroller is designed of inner-loop(SCAS : Stability Command Augmentation System) with DMI(Dynamic Model Inversion) and outer-loop with Y axis acceleration feedback for a coordinate turn. Additionally, double PCH method was adopted to prevent actuator saturation and input command was generated to compensate for failure. At the end, The feasibility of the method is validated with randomly selected failure scenarios.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.12 no.1
• /
• pp.74-80
• /
• 2007

This paper proposes the novel open-fault detection/isolation scheme of inverter switch in two-phase excited VSI. This scheme identify open-fault using voltage sensor at lower switches of each phase according to the operating mode. It has benefit of simple implementation, fast detection and robustness in the load so that stab of the system is improved. Also, at faulty mode, it minimizes faulty effect and makes possible continuous operation through the reconfiguration procedure applying four-switch operation. The validity of proposed fault detection scheme is verified by experimental results.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.16 no.10
• /
• pp.6666-6672
• /
• 2015

Various reflectometry methods to locate power cable fault have been studied. But, most related studies has been verifying by simulation and laboratory test and study in conditions similar with real cable fault filed was not performed due to the absence of cable fault test field. Therefore, this paper design and construct test field for the standardized performance test and the operating education of cable fault location equipments. In the constructed test, open, short, half open and poor contact fault at 100m, 200m location of cable was produced and 1km cable role was installed for maximum distance measurement test. The test field will be used in the development and standardization of cable fault location technology, and te performance evaluation and certificate test of the related equipments.

• 전기의세계
• /
• v.48 no.4
• /
• pp.4-8
• /
• 1999

• Proceedings of the KIPE Conference
• /
• 2017.07a
• /
• pp.481-482
• /
• 2017

본 논문에서는 케이블 고장 위치 검출을 위해 사용되고 있는 STDR(sequence time domain reflectomerty) 및 SSTDR(spread spectrum TDR) 기법의 성능을 향상시키기 위한 방법을 제안하였다. 제안된 방법은 시간-주파수 상관 분석을 이용하여 기준신호(reference signal)의 상관계수 최댓값 위치를 검출 한 후 기준신호를 제거하여 반사신호의 상관계수의 최댓값 위치를 검출하는 2단계 과정을 갖는다. 제안된 알고리즘은 저압 전력 케이블의 단선 및 합선 고장 검출 실험에서 보편적인 STDR 및 SSTDR 방법과의 성능 비교를 통해 입증하였다.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.15 no.3
• /
• pp.167-178
• /
• 2010

To diagnose a stator winding fault caused by a short-circuited turn in a permanent magnet synchronous motor (PMSM), an on-line based fault detecting scheme during motor operation is presented. The proposed scheme is based on monitoring the second-order harmonic components in q-axis current obtained through the harmonic analysis and a winding fault is detected by comparing these components with those in normal conditions. The linear interpolation method is employed to determine harmonic data in arbitrary normal operating conditions. To verify the effectiveness of the proposed fault detecting scheme, a test motor to allow inter-turn short in the stator winding has been built. The entire control system including harmonic analysis algorithm and fault detecting algorithm is implemented using DSP TMS320F28335. The proposed scheme does not require any additional hardware and can effectively detect a fault during motor operation so long as the steady-state condition is satisfied.

• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.40 no.12
• /
• pp.1040-1047
• /
• 2012

This paper presents a fault diagnosis algorithm of control surfaces of small fixed-wing aircraft to reduce maintenance cost or to improve repair efficiency by estimation of fault occurrence or part replacement periods. The proposed fault diagnosis algorithm consists of ANPSD (Averaged Normalized Power Spectral Density), PCA (Principle Component Analysis), and GC (Geometric Classifier). ANPSD is used for frequency-domain vibration testing. PCA has advantage to extract compressed information from ANPSD. GC has good properties to minimize errors of the fault detection and isolation. The algorithm was verified by the accelerometer measurements of the scaled normal and faulty ailerons and the test results show that the algorithm is suitable for the detection and isolation of the control surface faults. This paper also proposes solutions for some kind of implementation problems.

• Proceedings of the Korean Society of Computer Information Conference
• /
• 2017.07a
• /
• pp.129-130
• /
• 2017

본 연구에서는 피복 손상 등으로 누전되었을 때 그 주변의 자기장을 검출하여 누전 여부를 판단할 수 있는 장치를 개발하기 위하여 표면 누전에 의한 전류의 흐름을 조사하였고, 또한 전류에 의한 자계를 검출하기 위해 센서를 제작하였다. 전선 피복 손상에 의한 도전체 표면에 누전되는 상황을 모의하여 전력을 변화시켜서 실험을 수행하였다. 한편 표면에 발생되는 자계를 검출할 수 있도록 센서는 2축으로 구성하였으며, 이를 통해 전선 주변 및 누전된 도전체 표면에서 거리 및 각도 변화에 따른 자계를 검출하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.5
• /
• pp.15-24
• /
• 2009

This paper proposes an effective low power BIST architecture using the pattern mapping method for 100% fault coverage and the transition freezing method for making high correlative low power patterns. When frozen patterns are applied to a circuit, it begins to find a great number of faults at first. However, patterns have limitations of achieving 100% fault coverage due to random pattern resistant faults. In this paper, those faults are covered by the pattern mapping method using the patterns generated by an ATPG and the useless patterns among frozen patterns. Throughout the scheme, we have reduced an amount of applied patterns and test time compared with the transition freezing method, which leads to low power dissipation.

• Journal of Advanced Navigation Technology
• /
• v.24 no.4
• /
• pp.314-321
• /
• 2020

Logic automated stimulus and response (LASAR) software is an automatic test program development tool for logic function test and fault detection of avionics components digital circuit cards. LASAR software needs to the information for the logic circuit function and input and output of the device. If there is no component information, normal component modeling is impossible. In this paper, component modeling is carried out through reverse design of programmable logic device (PLD) device without element information. The developed LASAR program identified failure detection rates through fault simulation results and single-seated fault insertion methods. Fault detection rates have risen by 3% to 91% for existing limited modeling and 94% for modeling through the reverse design. Also, the 22 case of stuck fault with the I/O pin of EP310 PLD were detected 100% to confirm the good performance.