• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.44-53
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• 2008

In this paper, we present the design of delta-sigma modulation-based class-D amplifier for driving headphones in portable audio applications. The presented class-D amplifier generates PWM(pulse width modulation) signals using a single-bit fourth-order high-performance delta-sigma modulator. To achieve a high SNR(signal-to-noise ratio) and ensure system stability, the locations of the modulator loop filter poles and zeros are optimized and thoroughly simulated. The test chip is fabricated using a standard $0.18{\mu}m$ CMOS process. The active area of the chip is $1.6mm^2$. It operates for the signal bandwidth from 20Hz to 20kHz. The measured THD+N(total harmonic distortion plus noise) at the $32{\Omega}$ load terminal is less than 0.03% from a 3V power supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.8
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• pp.75-84
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• 2004

In this paper, we proposed an efficient hardware architecture of line-based lifting algorithm for Motion JPEG2000. We proposed a new architecture of a lifting-based filtering cell which has an optimized and simplified structure. It was implemented in a hardware accommodating both (9,7) and (5,4) filter. Since the output rate is linearly proportional to the input rate, one can obtain the high throughput through parallel operation simply by adding the hardware units. It was implemented into both of ASIC and FPGA The 0.35${\mu}{\textrm}{m}$ CMOS library from Samsung was used for ASIC and Altera was the target for FRGA. In ASIC, the proposed architecture used 41,592 gates for the lifting arithmetic and 128 Kbit memory. For FPGA it used 6,520 LEs(Logic Elements) and 128 ESBs(Embedded System Blocks). The implementations were stably operated in the clock frequency of 128MHz and 52MHz, respectively.

• Journal of the Korean Chemical Society
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• v.33 no.1
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• pp.46-54
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• 1989

The extraction method and quantitative analysis for the fat-soluble vitamins present in food stuffs and vitamin products have been investigated. The simultaneous separation and analysis of the vitamins by reverse phase high performance liquid chromatographic method was conducted using an isocratic elution with methanol : water (95 : 5) eluent on a Novapak $C_{18}$ column. The detection of vitamins was achieved by a variable wavelength UV detector. To improve the detection sensitivity detection wavelengths were set at the highest absorption bands such as 330, 265, 285, and 290nm for the respective vitamins. The analysis for the fat-soluble vitamins was finished within 40 minutes. Alkaline hydrolysis and enzymatic hydrolysis were investigated for the sample preparation; and liquid-liquid extraction and liquid-solid extraction were attempted for the extraction of vitamins. Both hydrolysis methods were turned out to be appropriate for the analysis for vitamins A, D, and E, while for the analysis of vitamin K the enzymatic hydrolysis method demonstrated better results. Diethyl ether, pentane, and n-hexane were found to give higher recovery for the liquid-liquid extraction and silica cartridge for the liquid-solid extraction.

• Journal of KIISE:Databases
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• v.31 no.4
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• pp.409-421
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• 2004

A database sharing system (DSS) couples a number of computing nodes for high performance transaction processing, and each node in DSS shares database at the disk level. In case of node failures in DSS, database recovery algorithms are required to recover the database in a consistent state. A database recovery process in DSS takes rather longer time compared with single database systems, since it should include merging of discrete log records in several nodes and perform REDO tasks using the merged lo9 records. In this paper, we propose a two version caching (2VC) algorithm that improves the cache fusion algorithm introduced in Oracle 9i Real Application Cluster (ORAC). The 2VC algorithm can achieve faster database recovery by eliminating the use of merged log records in case of single node failure. Furthermore, it can improve the performance of normal transaction processing by reducing the amount of unnecessary disk force overhead that occurs in ORAC.

• Journal of Broadcast Engineering
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• v.9 no.4 s.25
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• pp.371-383
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• 2004

In this paper we consider technological requirements to broadcast digital television signals using single frequency networks (SFN) in the Advanced Television Systems Committee (ATSC) transmission systems and propose equalization digital on-channel repeater (EDOCR) that overcomes the limitations of conventional digital on-channel repeaters (DOCRs). Since there are no forward error correction (FEC) decoder and encoder, the EDOCR does not have an ambiguity problem. In addition, since an adaptive equalizer in the EDOCR removes multi-path signals, additive white Gaussian noise (A WGN), and feedback signal due to low antenna isolation, the EDOCR may have good output signal quality with high power.

• Journal of KIISE:Computing Practices and Letters
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• v.8 no.3
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• pp.251-260
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• 2002

The parallel/distributed processing with a lot of the idle hosts on the web has the high coot-performance ratio for large-scale applications. It's processing has to show the solutions for unpredictable status such as heterogeneity of hosts, variability of hosts, autonomy of hosts, the supporting performance continuously, and the number of hosts which are participated in computation and so on. In this paper, we propose the strategy of adaptive tack reallocation based on performance the host job processing, spread out geographically Also, It shows the scheme of dynamic host management with dynamic environment, which is changed by lots of hosts on the web during parallel processing for large-scale applications. This paper implements the PDSWeb (Parallel/Distributed Scheme on Web) system, evaluates and applies It to the generation of rendering image with highly intensive computation. The results are showed that the adaptive task reallocation with the variation of hosts has been increased up to maximum 90% and the improvement in performance according to add/delete of hosts.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.19 no.8
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• pp.33-39
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• 2005

The maximum output torque and power developed by the machine is ultimately depended on the allowable inverter current rating and maximum voltage which the inverter can supply to the machine. Therefore, considering the limited voltage and current capacities, it is desirable to consider a control method which yields the best possible torque per ampere. In this paper, we propose fuzzy neural network(FNN) controller that combines a fuzzy control and the neural network for high performance control of induction motor drive. This controller composes antecedence of the fuzzy rules and consequence by a clustering method and a multi-layer neural networks. This controller is compounding of advantages that robust control of a fuzzy control and high-adaptive control of the neural networks. Also, this paper is proposed control of maximum torque per ampere(MTPA) of induction moor. This strategy is reposed which is simple in structure and has the honest goal of minimizing the stator current magnitude for given load torque. The performance of the proposed induction motor drive with maximum torque control using FNN controller is verified by analysis results at dynamic operation conditions.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.11
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• pp.635-642
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• 2004

The traditional communication protocols such as TCP/IP are not suitable for PC cluster systems because of their high software processing overhead. To eliminate this overhead, industry leaders have defined the Virtual Interface Architecture (VIA). VIA provides two different data transfer mechanisms, a traditional Send/Receive model and the Remote Direct Memory Access (RDMA) model. RDMA is extremely efficient way to reduce software overhead because it can bypass the OS and use the network interface controller (NIC) directly for communication, also bypass the CPU on the remote host. In this paper, we have implemented VIA-based RDMA mechanism in hardware. Compared to the traditional Send/Receive model, the RDMA mechanism improves latency and bandwidth. Our RDMA mechanism can also communicate without using remote CPU cycles. Our experimental results show a minimum latency of 12.5${\mu}\textrm{s}$ and a maximum bandwidth of 95.5MB/s. As a result, our RDMA mechanism allows PC cluster systems to have a high performance communication method.

• The KIPS Transactions:PartA
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• v.8A no.4
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• pp.419-428
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• 2001

Advances in circuit and integration technology are continuously boosting the speed of processors. One of the main challenges presented by such developments is the effective use of powerful processors in shared memory multiprocessor system. We believe that the interconnection problem is not solved even for small scale shared memory multiprocessor, since the speed of shared buses is unlikely to keep up with the bandwidth requirements of new powerful processors. In the past few years, point-to-point unidirectional connection have emerged as a very promising interconnection technology. The single slotted ring is the simplest form point-to-point interconnection. The main limitation of the single slotted ring architecture is that latency of access increase linearly with the number of the processors in the ring. Because of this, we proposed the dual slotted ring as an alternative to single slotted ring for cache-based multiprocessor system. In this paper, we analyze the proposed dual slotted ring architecture using new snooping protocol and enforce simulation to compare it with single slotted ring.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.9
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• pp.898-903
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• 2010

Popularity of smartphones such as Google Android phones and Apple iphones, is increasing the demand on more reliable high performance file system for flash memory. In this paper, we propose two techniques to improve the performance of YAFFS (Yet Another Flash File System), while enhancing the reliability of the system. Specifically, we first propose to manage metadata and user data separately on segregated blocks and indexing information piggy-back technique for reducing mount time and also enhancing performance. Second, we tailor the wear-leveling to the segregated metadata and user data blocks. Performance evaluation results based on real hardware system with 1GB NAND flash memory show that the YAFFS with our proposed techniques realized outperforms the original YAFFS by six times in terms of mount speed and five times in terms of benchmark performance, while reducing the average erase count of blocks by 14%.