• Journal of IKEEE
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• v.7 no.1 s.12
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• pp.43-55
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• 2003

A degenerated differential pair has been widely used as a standard topology for digitally programmable CMOS VGAs. A variable degeneration resistor has been implemented using a resistor string or R-2R ladder with MOSFET switches. However, in the VGAs using these conventional methods, low-voltage and high-speed operation is very hard to achieve due to the dc voltage drop over the degeneration resistor. To overcome the problem a new variable degeneration resistor is proposed where the dc voltage drop is almost removed. The proposed gain control scheme makes it easy to implement a low-voltage and high-speed VGA. This paper describes the problems existed in conventional methods, the principle and advantages of the proposed scheme, and their performance comparison in detail. A CMOS VGA cell is designed using the proposed degeneration resistor. The 3dB bandwidths are greater than 650㎒ and the gain errors are less than 0.3dB in a gain control range from -12dB to +12dB in 6dB steps. It consumes 3.1㎃ from a 2.5V supply voltage.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.873-876
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• 1999

A variable gain amplifier(VGA) for wireless LAN is designed using active feedback. The amplifier is controlled by the gate voltage in the feedback path. This amplifier has more than 30㏈ gain variation and a improved linearity in the RF receiver block as input voltage increases. An active feedback topology is used by P-HEMT and is also analyzed for FET equivalent model.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.621-624
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• 2003

In this paper, two Cascode Low Noise Variable Gain Amplifiers are proposed for wide dynamic range and constant Noise Figure for frequency range of 2.4GHz. Designed Variable Gain Low Noise Amplifier are for Wireless Local Area Network (WLAN) applications. A gain is higher than 17dB and the noise figure is approximately 1.3dB and the input VSWR is better than 2:1.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.3
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• pp.685-690
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• 2013

This paper has proposed a multi-channel and wide gain-range baseband circuit blocks for the IEEE 802.15.4g MR-OFDM SUN systems. The proposed baseband circuit blocks consist of two negative-feedback VGAs, an active-RC 5th-order chebyshev low-pass-filter, and a DC-offset cancellation circuit. The proposed baseband circuit blocks provide 1 dB cut-off frequencies of 100 kHz, 200 kHz, 400 kHz, and 600 kHz respectively, and achieve a wide gain-range of +7 dB~+84 dB with 1 dB step. In addition, a DC-offset cancellation circuit has been adopted to mitigate DC-offset problems in direct-conversion receiver. Simulation results show a maximum input differential voltage of $1.5V_{pp}$ and noise figure of 42 dB and 37.6 dB at 5 kHz and 500 kHz, respectively. The proposed I-and Q-path baseband circuits have been implemented in $0.18-{\mu}m$ CMOS technology and consume 17 mW from a 1.8 V supply voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.12
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• pp.91-96
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• 2011

In this paper, a low-power direct-conversion transmitter based on current-mode operation, which satisfies the IEEE 802.15.4 standard, is proposed and implemented in a $0.13{\mu}m$ CMOS technology. The proposed transmitter consists of DACs, LPFs, variable gain I/Q up-conversion mixer, a divide-by-two circuit with LO buffer, and a drive amplifier. By combining DAC, LPF, and variable gain I/Q up-conversion mixer with a simple current mirror configuration, the transmitter's power consumption is reduced and its linearity is improved. The drive amplifier is a cascode amplifier with gain controls and the 2.4GHz I/Q differential LO signals are generated by a divide-by-two current-mode-logic (CML) circuit with an external 4.8GHz input signal. The implemented transmitter has 30dB of gain control range, 0dBm of maximum transmit output power, 33dBc of local oscillator leakage, and 40dBc of the transmit third harmonic component. The transmitter dissipates 10.2mW from a 1.2V supply and the die area of the transmitter is $1.76mm{\times}1.26mm$.

• Journal of Advanced Navigation Technology
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• v.13 no.1
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• pp.48-53
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• 2009

The CMOS RF front-end for Global Positioning System(GPS)are implemented in 1P8M CMOS $0.13{\mu}m$ process. The LNAs consist of LNA1 with high gain and low NF, and LNA2 with low gain and high IIP3 for supporting operation with active and passive antenna. the measured performances of both LNAs are 16.4/13.8 dB gain, 1.4/1.68 dB NF, and -8/-4.4 dBm IIP3 with 3.2/2 mA form 1.2 V supply, respectively. The quadrature downconversion mixer is followed by transimpedance amplifier with gain controllability from 27.5 to 41 dB. The front-end performances in LNA1 mode are 39.8 dB conversion gain, 2.2 dB NF, and -33.4 dBm IIP3 with 6.6 mW power consumption.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.219-225
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• 2012

A low-power, low-noise pre-amplifier for digital hearing-aid application is designed. This pre-amplifier amplifies single-ended signal from an electret microphone, and produces differential output to be delivered to an ADC. It has a variable gain of 3.6, 7.2, 14.4 and 28.8 with a bandwidth between 100Hz~10kHzon. The measurement results show 85 dB of SNR, 0.05 % of harmonic distortion and $200{\mu}W$ of power consumption with 1.2V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.68-74
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• 2010

A sub-${\mu}$W CMOS Wien-Bridge oscillator for ultra low power (ULP) radio applications is presented. The Wien-Bridge oscillator is based on an non-inverting opamp amplifier with a closed-loop gain $1+R_2/R_1$ as a means of providing necessary loop gain. An additional RC network provides appropriate phase shift for satisfying the Barkhausen oscillation condition at the given frequency of 1/($2{\pi}RC$). In this design, we propose a novel loop gain control method based on a variable capacitor network instead of a rather conventional variable resistor network. Implemented in $0.18{\mu}m$ CMOS, the oscillator consumes only 560 nA at the oscillation frequency of 22 kHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.9
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• pp.673-684
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• 2003

A degenerated differential pair has been widely used as a standard topology for digitally programmable CMOS VGAs. A variable degeneration resistor has been implemented using a resistor string or R-2R ladder with MOSFET switches. However, in the VGAs using these conventional methods, low-voltage and high-speed operation is very hard to achieve due to the dc voltage drop over the degeneration resistor. To overcome this problem a new variable degeneration resistor is proposed where the dc voltage drop is almost removed. Using the proposed gain control scheme, a low-voltage and high-speed CMOS VGA is designed. HSPICE simulation results using a 0.25${\mu}{\textrm}{m}$ CMOS process parameters show that the designed VGA provides a 3dB bandwidth of 360MHz and a 80dB gain control range in 2dB step. Gain errors are less than 0.4dB at 200MHz and less than l.4dB at 300MHz. The designed circuit consumes 10.8mA from a 2.5V supply and its die area is 1190${\mu}{\textrm}{m}$${\times}$360${\mu}{\textrm}{m}$.

• The Journal of the Acoustical Society of Korea
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• v.41 no.5
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• pp.507-517
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• 2022

The PhotoAcoustic Microscopy (PAM) has been proved to be a useful tool for biological and medical applications due to its high spatial and contrast resolution. PAM is based on transmission of laser pulses and reception of PA signals. Since the strength of PA signals is generally low, not only are high-performance optical and acoustic modules required, but high-performance electronics for imaging are also particularly needed for high-quality PAM imaging. Most PAM systems are implemented with a combination of several pieces of equipment commercially available to receive, amplify, enhance, and digitize PA signals. To this end, PAM systems are inevitably bulky and not optimal because general purpose equipment is used. This paper reports a PA signal receiving system recently developed to attain the capability of improved Signal to Noise Ratio (SNR) and Contrast to Noise Ratio (CNR) of PAM images; the main module of this system is a low noise, wideband signal receiver that consists of two low-noise amplifiers, two variable gain amplifiers, analog filters, an Analog to Digital Converter (ADC), and control logic. From phantom imaging experiments, it was found that the developed system can improve SNR by 6.7 dB and CNR by 3 dB, compared to a combination of several pieces of commercially available equipment.