• Title/Summary/Keyword: $TiO_2$박막

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Fabrication of High Tunable BST Thin Film Capacitors using Pulsed Laser Deposition (펄스 레이저 증착법에 의한 BST 박막 가변 Capacitors 제작)

  • Kim, Sung-Su;Song, Sang-Woo;Roh, Ji-Hyoung;Kim, Ji-Hong;Koh, Jung-Hyuk;Moon, Byung-Moo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.79-79
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    • 2008
  • We report the growth of $Ba_{0.5}Sr_{0.5}TiO_3$(BST) thin films and their substrate-dependent electrical characteristics. BST thin films were deposited on alumina(non-single crystal), $Al_2O_3$(100) substrates by Nd:YAG Pulsed Laser Deposition(PLD) with a 355nm wavelength at substrate temperature of $700^{\circ}C$ and post-deposition annealing at $750^{\circ}C$ in flowing $O_2$ atmosphere for 1hours. BST materials had been chosen due to high dielectric permittivity and tunability for high frequency applications, To analyze the oxygen partial pressure effects, deposited films at 1, 10, 50, 100, 150, 200, 300 mTorr. The effects of oxygen pressure on structural properties of the deposited films have been investigated by X-ray diffraction(XRD) and atomic force microscope(AFM), respectively. Then we manufactured a inter-digital capacitor(IDC) patterns twenty fingers and $10{\mu}m$ gap, $700{\mu}m$ length and electrical properties were characterized. The results provide a basis for understanding the growth mechanisms and basic structural and electrical properties of BST thin films as required for tunable microwave devices applications such as varactors and tunable filters.

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A study on Improvement of sub 0.1$\mu\textrm{m}$VLSI CMOS device Ultra Thin Gate Oxide Quality Using Novel STI Structure (STI를 이용한 서브 0.1$\mu\textrm{m}$VLSI CMOS 소자에서의 초박막게이트산화막의 박막개선에 관한 연구)

  • 엄금용;오환술
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.9
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    • pp.729-734
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    • 2000
  • Recently, Very Large Scale Integrated (VLSI) circuit & deep-submicron bulk Complementary Metal Oxide Semiconductor(CMOS) devices require gate electrode materials such as metal-silicide, Titanium-silicide for gate oxides. Many previous authors have researched the improvement sub-micron gate oxide quality. However, few have reported on the electrical quality and reliability on the ultra thin gate oxide. In this paper, at first, I recommand a novel shallow trench isolation structure to suppress the corner metal-oxide semiconductor field-effect transistor(MOSFET) inherent to shallow trench isolation for sub 0.1${\mu}{\textrm}{m}$ gate oxide. Different from using normal LOCOS technology deep-submicron CMOS devices using novel Shallow Trench Isolation(STI) technology have a unique"inverse narrow-channel effects"-when the channel width of the devices is scaled down, their threshold voltage is shrunk instead of increased as for the contribution of the channel edge current to the total channel current as the channel width is reduced. Secondly, Titanium silicide process clarified that fluorine contamination caused by the gate sidewall etching inhibits the silicidation reaction and accelerates agglomeration. To overcome these problems, a novel Two-step Deposited silicide(TDS) process has been developed. The key point of this process is the deposition and subsequent removal of titanium before silicidation. Based on the research, It is found that novel STI structure by the SEM, in addition to thermally stable silicide process was achieved. We also obtained the decrease threshold voltage value of the channel edge. resulting in the better improvement of the narrow channel effect. low sheet resistance and stress, and high threshold voltage. Besides, sheet resistance and stress value, rms(root mean square) by AFM were observed. On the electrical characteristics, low leakage current and trap density at the Si/SiO$_2$were confirmed by the high threshold voltage sub 0.1${\mu}{\textrm}{m}$ gate oxide.

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Dry etching properties of PST thin films using chlorine-based inductively coupled plasma (Chlorine-based 유도결합 플라즈마를 이용한 PST 박막의 건식 식각 특성)

  • Kim, Gwan-Ha;Kim, Kyoung-Tae;Kim, Dong-Pyo;Lee, Cheol-In;Kim, Chang-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.400-403
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    • 2003
  • Etching characteristics of (Pb,Sr)$TiO_3$(PST) thin films were investigated using inductively coupled chlorine based plasma system as functions of gas mixing ratio, RF power and DC bias voltage. It was found that increasing of Ar content in gas mixture lead to sufficient increasing of etch rate and selectivity of PST to Pt. The maximum etch rate of PST film is $562\;{\AA}$/min and the selectivity of PST film to Pt is 0.8 at $Cl_2/(Cl_2+Ar)$ of 20 %. It was proposed that sputter etching is dominant etching mechanism while the contribution of chemical reaction is relatively low due to low volatility of etching products.

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Electrical Properties of Sol-Gel Drived Ferroelectric PZT Thin Films dependent on Dry Temperature and Heat Treatment (Sol-gel법으로 제조된 강유전성 PZT박막의 건조온도 및 열처리에 따른 전기적 특성 평가)

  • 배민호;임민수;김명녕;김동규;임기조;김현후
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.665-668
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    • 1999
  • Thin films of Pb(Zr,Ti)O$_3$ were fabricated by means of the sol-gel spin-coating method and the multi-coating of eight coating numbers. The thin films were dried on the temperature range of 250 ~ 400($^{\circ}C$), whenever the specimens were dried after each coating Processing. The fabricated ferroelectric thin films of lead zirconate titanate(PZT) were treated with the rapid thermal annealing(RTA) at 650($^{\circ}C$),or 3(min), and direct insertion thermal annealing(DITA) at 650($^{\circ}C$), for 30(min). The measured properties of dielectric thin films were following: The good results of dielectric properties were shown by the RTA specimen. The saturation polarization(Ps), remanent polarization(Pr), coercive field (Ec), dielectric constant and dielectric loss factor of the RTA specimen were estimated to be about 27.1[ $\mu$ C/$\textrm{cm}^2$], 13.7[ $\mu$ C/$\textrm{cm}^2$], 55.6(kV/cm), 786 and 6.4(%) respectively.

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Piezoelectric and electromechanical properties of PZT films and PZT microcantilever (PZT 박막의 압전 특성 및 MEMS 기술로 제작된 PZT cantilever의 전기기계적 물성 평가)

  • 이정훈;황교선;윤기현;김태송
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.177-180
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    • 2002
  • Thickness dependence of crystallographic orientation of diol based sol-gel derived PZT(52/48) films on dielectric and piezoelectric properties was investigated The thickness of each layer by one time spinning was about 0.2 $\mu\textrm{m}$, and crack-free films was successfully deposited on 4 inches Pt/Ti/SiO$_2$/Si substrates by 0.5 mol solutions in the range from 0.2 $\mu\textrm{m}$ to 3.8 $\mu\textrm{m}$. Excellent P-E hysteresis curves were achieved without pores or any defects between interlayers. As the thickness increased , the (111) preferred orientation disappeared from 1$\mu\textrm{m}$ to 3 $\mu\textrm{m}$ region, and the orientation of films became random above 3 $\mu\textrm{m}$. Dielectric constants and longitudinal piezoelectric coefficient d$\_$33/, measured by pneumatic method were saturated around the value of about 1400 and 300 pC/N respectively above the thickness of 0.8 7m. A micromachined piezoelectric cantilever have been fabricated using 0.8 $\mu\textrm{m}$ thickness PZT (52/48) films. PZT films were prepared on Si/SiN$\_$x/SiO$_2$/Ta/Pt substrate and fabricated unimorph cantilever consist of a 0.8 fm thick PZT layer on a SiNx elastic supporting layer, which becomes vibration when ac voltage is applied to the piezoelectric layer. The dielectric constant (at 100 kHz) and remanent polarization of PZT films were 1050 and 25 ${\mu}$C/$\textrm{cm}^2$, respectively. Electromechanical characteristics of the micromachined PZT cantilever in air with 200-600 $\mu\textrm{m}$ lengths are discussed in this presentation.

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Design and Fabrication of a PZT cantilever for low resonant frequency energy harvesting (낮은 공진 주파수를 갖는 PZT 외팔보 에너지 수확소자의 설계 및 제작)

  • Kim, Moon-Keun;Hwang, Beom-Seok;Seo, Won-Jin;Choi, Seung-Min;Jeong, Jae-Hwa;Kwon, Kwang-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.228-228
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    • 2010
  • 본 연구에서는 공진주파수 수식을 이용한 MATLAB과 Modal 해석법을 사용한 ANSYS로 공진주파수 특성을 시뮬레이션 하였다. 외팔보의 시뮬레이션 결과에서는 길이가 길어짐에 따라, 또는 proof mass의 크기가 커짐에따라 공진주파수 특성이 낮아지는 결과가 나타났다. 따라서 본 실험에서의 외팔보는 낮은 공진 주파수를 가지기 위해 Si proof mass를 사용하여 제작하였다. 외팔보 소자는 Silicon-on-insulator wafer를 사용하여 SiO2/Ti/Pt/PZT/Pt 박막을 증착하였고, 마스크를 사용한 식각 공정으로 제작하였다. 이때의 MATLAB, ANSYS 시뮬레이션 결과와 실험에서 제작된 소자는 유사한 공진주파수 특성을 나타내었다.

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Dielectric Properties and Leakage Current Characteristics of PZT Heterolayered Thin Films by the Sol-Gel Method (Sol-Gel 법으로 제작한 PZT이종층 박막의 운전 및 누설전류 특성)

  • Shim, Kwang-Taek;Lee, Young-Hie;Lee, Sung-Gap;Bae, Seon-Gi
    • Proceedings of the KIEE Conference
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    • 1997.07d
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    • pp.1229-1231
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    • 1997
  • In this work, PZT(20/80)/(80/20) heterolayered thin film that has the tetragonal and rhombohedral structure was fabricated by Sol-Gel method spin-coated on the Pt/Ti/$SiO_2$/Si substrate by turns. The thickness of PZT-1 film obtained by six-times of drying/sintering process was about 480[nm]. This procedure was repeated several times to form PZT heterolayered thim film. PZT-5 thin films with top layer of tetragonal PZT(20/80) thin film showed dense grain structure and PZT-6 thin film with top layer of rhombohedral PZT(80/20) thin film showed the microstructure without rosette. Dielectric constant increased with increasing the number of coatings, and it was about 13S5 at PZT-6 thin film. Dielectric loss was not depend on the number of coatings.

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The effect of deposition temperature/pressure on the superconducting properties of YBCO coated conductor (YBCO coated conductor의 초전도 특성에 미치는 박막 증착 온도/압력의 영향)

  • Park, Chan;Ko, Rok-Kil;Chung, Jun-Ki;Choi, Soo-Jeong;Song, Kyu-Jeong;Park, Yu-Mi;Shin, Ki-Chul;Shi, Dongqi;Yoo, Sang-Im
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05a
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    • pp.30-33
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    • 2003
  • YBCO coated conductor, also called the 2nd generation high temperature superconducting wire, consists of oxide multi-layer hetero-epitaxial thin films. Pulsed laser deposition (PLD) is one of many film deposition methods used to make coated conductor, and is the one known to be the best to make superconducting layer so far. As a part of the effort to make long length coated conductor, the optimum deposition condition of YBCO film on single crystal substrate (SrTiO3) was investigated using PLD. Substrate temperature, oxygen partial pressure, and laser fluence were varied to find the best combination to grow high quality YBCO film.

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Dielectric properties of PST (20/80)/ PST(80/20) heterolayered thin films (PST (20/80)/ PST(80/20) 이종층 박막의 유전특성)

  • Kim, Kyoung-Tae;Kim, Gwan-Ha;Woo, Jong-Changb;Kim, Jong-Gyu;Kang, Chan-Min;Kim, Chang-II
    • Proceedings of the KIEE Conference
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    • 2006.10a
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    • pp.115-116
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    • 2006
  • Dielectric PST (20/80) / PST (80/20) heterolayered thin films structures were created by a consequent deposition of the PST (20/80) and PST (80/20) thin films on the $Pt/Ti/SiO_2/Si$ substrate using alkoxide-based sol-gel method. Both structural and dielectric properties of heterolayered PST thin films were investigated for the tunable microwave device applications. As the number of coating increases, the lattice distortion decreased. It can be assumed that the lower PST layer affects a nucleation site or a seeding layer for the formation of the upper PST layer. The dielectric constant, dielectric loss and tunability of the PST-6 heterolayered structure measured at 100 kHz were 399, 0.022 and 57.9%, respectively. All these parameters showed an increase with increasing number of coatings due to the decrease in lattice distortion.

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A Study of Pore Formation of AAO Film on Si Substrate with Optimizing Process (Si 기판에 제작된 AAO 박막의 기공 형성 최적화에 관한 연구)

  • Kwon, Soon-Il;Yang, Kea-Joon;Song, Woo-Chang;Lee, Jae-Hyeong;Lim, Dong-Gun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.5
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    • pp.415-420
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    • 2008
  • AAO films were fabricated on two kinds of substrates such as $Al/SiO_2/Si$ and Al/Ni/Ti/Si. To obtain well-aligned AAO film, we optimized process condition for buffer layer, electrolyte and voltage. In the case of oxalic acid, the AAO film with pore size of approximately 45 nm was obtained at voltage of 40 V, temperature of $10^{\circ}C$, oxalic acid of 0.3 M and widening time of 60 min. Then the thickness of barrier is less than 600 nm. In the case of sulfuric acid, the AAO film has pore size of 40 nm and barrier thickness of 400 nm with optimum conditions such as voltage of 25 V, temperature of $8^{\circ}C$, sulfuric acid of 0.3 M and widening time of 60 min.