• Solar Energy
• /
• v.10 no.3
• /
• pp.60-65
• /
• 1990

[ $n^+-p^+$ ] InP homojunction solar cells were fabricated by thermal diffusion of sulphur into a $p^+$-InP wafer($p=4{\times}10^{18}cm^{-3}$), and a SiO film($600{\AA}$ thick) was coated on the $n^+$ layer as an antireflection(AR) coating by an e-beam evaporator. The volume of the cells were $5{\times}5{\times}0.3mm^3$. The front contact grids of the cells with 16 finger pattern of which width and space were $20{\mu}m$ and $300{\mu}m$ respectively, were formed by photo-lithography technique. The junction depth of sulphur were as shallow as about 0.4r m We found out the fabricated solar cells that, with increasing the diffusion time, short circuit current densities($J_{sc}$), series resistances($R_s$) and energy conversion efficiencies(${\eta}$) were increased. The cells show good spectral responses in the region of $5,000-9,000{\AA}$. The short circuit current density, the open circuit voltage( $V_{oc}$), the fill factor(F.F) and the energy conversion efficiency of the cell were $13.16mA/cm^2$, 0.38V, 53.74% and 10.1% respectively.

• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.21 no.3
• /
• pp.110-113
• /
• 2011

In this paper, we propose a new method for the fabrication of GaN microstructures formed only on the vertex of GaN pyramid by using of metal catalysts. GaN pyramidal structures were selectively grown on 3 ${\mu}m$ $SiO_2$ dot patterns followed by thin film deposition of Au and Cr only on the vertex area of the GaN pyramids with precisely controlled photolithography. After the metal deposition, the samples were loaded in the MOVPE reactor for the growth of GaN microstructures for 10 minutes. Temperature for the growth of the GaN microstructures was changed from $650^{\circ}C$ to $750^{\circ}C$. Rod type GaN microstructures were grown in the direction of vertical to the six {1-101} facets and the shape of the GaN microstructures was changed depend on the type of metal.

• Journal of the Korean Ceramic Society
• /
• v.41 no.6
• /
• pp.450-455
• /
• 2004

NiCr thin films were fabricated by thermal evaporation method using NiCr alloy as evaporating source. NiCr thin films were annealed at various temperatures in air atmosphere in order to investigate effects of annealing conditions on phase change, composition, and microstructures of NiCr films. Typical multilayer was formed after annealing in air atmosphere. This results from the diffusion and oxidation of Cr toward surface during annealing. In the case of annealing at 700$^{\circ}C$, large columnar grains of NiO were formed on Cr-oxide layer through the diffusion and oxidation of Ni over Cr-oxide layer. Especially, NiO layer was formed additionally on surface, sustaining the underlayer structure with the formation of porous Ni layer.

• Macromolecular Research
• /
• v.17 no.7
• /
• pp.491-498
• /
• 2009

New $\pi$-conjugated multi-branched molecules were synthesized through the Homer-Emmons reaction using alkyl-substituted, 3,4-ethylenedioxythiophene-based, thiophenyl aldehydes and octaethyl benzene-l,2,4,5-tetrayltetrakis(methylene) tetraphosphonate as the core unit; these molecules have all been fully characterized. The two multi-branched conjugated molecules exhibited excellent solubility in common organic solvents and good self-film forming properties. The semiconducting properties of these multi-branched molecules were also evaluated in organic field-effect transistors (OFET). With octyltrichlorosilane (OTS) treatment of the surface of the $SiO_2$ gate insulator, two of the crystalline conjugated molecules, 7 and 8, exhibited carrier mobilities as high as $2.4({\pm}0.5){\times}10^{-3}$ and $1.3({\pm}0.5){\times}10^{-3}cm^2V^{-1}s^{-1}$, respectively. The mobility enhancement of OFET by light irradiation ($\lambda$ = 436 nm) supported the promising photo-controlled switching behavior for the drain current of the device.

• Journal of the Korean Vacuum Society
• /
• v.14 no.4
• /
• pp.215-221
• /
• 2005

Thermoelectric bismuth telluride thin films were prepared on $SiO_{2}$/Si substrate with co-sputtering of bismuth and tellurium targets. The effects of deposition temperature on surface morphology, crystallinity and electrical transport properties were investigated. Hexagonal crystallites were clearly visible at the surface of films deposited above $290 ^{\circ}C$. Change of dominant phase from rhombohedral $Bi_2Te_3$ to hexagonal BiTe was confirmed with X-ray diffraction analysis. The deviation from stoichiometric composition at high deposition temperature resulted in the change of structural and electrical characteristics. Seebeck coefficients of all samples have negative value, indicating the prepared $Bi_XTe_Y$ films are n-type thermoelectric. Optimum of Seebeck coefficient and power factor were obtained at the deposition temperature of $225 \^{circ}$C (about -55 $\mu$V/K and $3\times10^{-4}$ W/$k^{2}$m, respectively). Deterioration of thermoelectric properties at higher temperature.

• Journal of the Korean Ceramic Society
• /
• v.33 no.5
• /
• pp.572-582
• /
• 1996

The porous silicon was prepared in the condition of 70mA/cm2 and 5.10 sec and then oxidized at 800~110$0^{\circ}C$ MOS(Metal Oxide Semiconductor) structure was prepared by Al electrode deposition and analyzed by C-V (Capacitance-Voltage) characteristics. Dielectric constant of oxidized porous silicon was large in the case of low temperature (800, 90$0^{\circ}C$) and short time(20-30min) oxidation and was nearly the same as thermal SiO2 3.9 in the case of high temperature (110$0^{\circ}C$) and long time (above 60 min) It is though to be caused byunoxidized silicon in oxidized porous silicon film and capacitance increase due to surface area increment effect.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.274-274
• /
• 2014

금속칼코게나이드 화합물중 하나인 $MoS_2$는 초저 마찰계수의 금속성 윤활제로 널리 사용되고 있으며 흑연과 비슷한 판상 구조를 지니고 있어 기계적 박리법을 통한 그래핀의 발견 이후 2차원 박막 합성법에 대한 활발한 연구가 진행되고 있다. 최근 다양한 응용이 진행 중인 그래핀의 경우 높은 전자이동도, 기계적 강도, 유연성, 열전도도 등 뛰어난 물리적 특성을 지니고 있으나 zero-bandgap으로 인한 낮은 on/off ratio는 thin film transistor (TFT), 논리회로(logic circuit) 등 반도체 소자 응용에 한계가 있다. 하지만 $MoS_2$는 벌크상태에서 약 1.2 eV의 indirect band-gap을 지닌 반면 단일층의 경우 1.8 eV의 direct-bandgap을 나타내고 있다. 또한 단일층 $MoS_2$를 이용하여 $HfO_2/MoS_2/SiO_2$ 구조의 트랜지스터를 제작하였을 때 $200cm^2/v^{-1}s^{-1}$의 높은 mobility와 $10^8$ 이상의 on/off ratio 나타낸다는 연구가 보고되어 있어 박막형 트랜지스터 응용을 위한 신소재로 주목을 받고 있다. 한편 2차원 $MoS_2$ 박막을 합성하기 위한 대표적인 방법인 기계적 박리법의 경우 고품질의 단일층 $MoS_2$ 성장이 가능하지만 대면적 합성에 한계를 지니고 있으며 화학기상증착법(CVD)의 경우 공정 gas의 분해를 위한 높은 온도가 요구되므로 박막형 투명 트랜지스터 응용을 위한 플라스틱 기판으로의 in-situ 성장이 어렵기 때문에 이를 보완할 수 있는 $MoS_2$ 박막 합성 공정 개발이 필요하다. 특히 Plasma enhanced chemical vapor deposition (PECVD) 방법은 공정 gas가 전기적 에너지로 분해되어 chamber 내부에서 cold-plasma 형태로 존 재하기 때문에 박막의 저온성장 및 대면적 합성이 가능하며 고진공을 바탕으로 합성 중 발생하는 오염 요소를 효과적으로 제어할 수 있다. 본 연구에서는PECVD를 이용하여 plasma power, 공정압력, 공정 gas의 유량 등 다양한 공정 변수를 조절함으로써 저온, 저압 조건하에서의 $MoS_2$ 박막 성장 가능성을 확인하였으며 전구체로는 Mo 금속과 $H_2S$ gas를 사용하였다. 또한 향후 flexible 소자 응용을 위한 플라스틱 기판의 녹는점을 고려하여 공정 온도는 $300^{\circ}C$ 이하로 설정하였으며 합성된 $MoS_2$ 박막의 두께 및 화학적 구성은 Raman spectroscopy를 이용하여 확인 하였다. 공정온도 $200^{\circ}C$와 $150^{\circ}C$에서 성장한 $MoS_2$ 박막의 Raman peak의 경우 상대적으로 낮은 공정온도로 인하여 Mo와 H2S의 화학적 결합이 감소된 것을 관찰할 수 있었고 $300^{\circ}C$의 경우 약 $26{\sim}27cm^{-1}$의 Raman peak 간격을 통해 5~6층의 $MoS_2$ 박막이 형성 된 것을 확인할 수 있었다.

• Journal of the Korean institute of surface engineering
• /
• v.38 no.2
• /
• pp.65-68
• /
• 2005

The effect of crystal orientation and microstructure on the mechanical properties of $TaN_x$ was investigated. $TaN_x$ films were grown on $SiO_2$ substrates by ultrahigh vacuum unbalanced magnetron sputter deposition in mixed $Ar/N_2$ discharges at 20 mTorr (2.67 Pa) and at $350^{\circ}C$. Unlike the Ti-N system, in which TiN is the terminal phase, a large number of N-rich phases in the Ta-N system could lead to layers which had nano-sized lamella structure of coherent cubic and hexagonal phases, with a correct choice of nitrogen fraction in the sputtering mixture and ion irradiation energy during growth. The preferred orientations and the micro-structure of $TaN_x$ layers were controlled by varing incident ion energy $E_i\;(=30eV\~50eV)$ and nitrogen fractions $f_{N2}\;(=0.1\~0.15)$. $TaN_x$ layers were grown on (0002)-Ti underlayer as a crystallographic template in order to relieve the stress on the films. The structure of the $TaN_x$ film transformed from Bl-NaCl $\delta-TaN_x$ to lamellar structured Bl-NaCl $\delta-TaN_x$ + hexagonal $\varepsilon-TaN_x$ or Bl-NaCl $\delta-TaN_x$ + hexagonal $\gamma-TaN_x$ with increasing the ion energy at the same nitrogen fraction $f_{N2}$. The hardness of the films also increased by the structural change. At the nitrogen fraction of $0.1\~0.125$, the structure of the $TaN_x$ films was changed from $\delta-TaN_x\;+\;\varepsilon-TaN_x\;to\;\delta-TaN_x\;+\;\gamma-TaN_x$ with increasing the ion energy. However, at the nitrogen fraction of 0.15 the film structure did not change from $\delta-TaN_x\;+\;\varepsilon-TaN_x$ over the whole range of the applied ion energy. The hardness increased significantly from 21.1 GPa to 45.5 GPa with increasing the ion energy.

• Journal of the Korean Society for Precision Engineering
• /
• v.31 no.10
• /
• pp.881-887
• /
• 2014

Micro-sized Peltier coolers are generally employed for uniformly distributing heat generated in the multi-chip packages. These coolers are commonly classified into vertical and planar devices, depending on the heat flow direction and the arrangement of thermoelectric materials on the used substrate. Owing to the strong need for evaluation of performance of thermoelectric modules, at present an establishment of proper theoretical model has been highly required. The design theory for micro-sized thermoelectric cooler should be considered with contact resistance. Cooling performance of these modules was significantly affected by their contact resistance such as electrical and thermal junction. In this paper, we introduce the useful and optimal design model of small dimension thermoelectric module.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.273.2-273.2
• /
• 2014

Sputtering process has been widely used in Si-based semiconductor industry and it is also an ideal method to deposit transparent oxide materials for thin-film transistors (TFTs). The oxide films grown at low temperature by conventional RF sputtering process are typically amorphous state with low density including a large number of defects such as dangling bonds and oxygen vacancies. Those play a crucial role in the electron conduction in transparent electrode, while those are the origin of instability of semiconducting channel in oxide TFTs due to electron trapping. Therefore, post treatments such as high temperature annealing process have been commonly progressed to obtain high reliability and good stability. In this work, the scheme of electron-assisted RF sputtering process for high quality transparent oxide films was suggested. Through the additional electron supply into the plasma during sputtering process, the working pressure could be kept below $5{\times}10-4Torr$. Therefore, both the mean free path and the mobility of sputtered atoms were increased and the well ordered and the highly dense microstructure could be obtained compared to those of conventional sputtering condition. In this work, the physical properties of transparent oxide films such as conducting indium tin oxide and semiconducting indium gallium zinc oxide films grown by electron-assisted sputtering process will be discussed in detail. Those films showed the high conductivity and the high mobility without additional post annealing process. In addition, oxide TFT characteristics based on IGZO channel and ITO electrode will be shown.