• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.2
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• pp.115-118
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• 2017

Highly photosensitive and wide bandgap amorphous silicon oxide (a-$SiO_x$:H) films were developed at low temperature ranges ($100{\sim}150^{\circ}C$) with employing plasma-enhanced chemical vapor deposition by optimizing $H_2/SiH_4$ gas ratio and $CO_2$ flow. Photosensitivity more than $10^5$ and wide bandgap (1.81~1.85 eV) properties were used for making the a-$SiO_x$:H thin film solar cells, which exhibited a high open circuit voltage of 0.987 V at the substrate temperature of $100^{\circ}C$. In addition, a power conversion efficiency of 6.87% for the cell could be improved up to 7.77% by employing a new n-type nc-$SiO_x$:H/ZnO:Al/Ag triple back-reflector that offers better short circuit currents in the thin film photovoltaic devices.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.06a
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• pp.161-161
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• 1998

• Proceedings of the Korean Vacuum Society Conference
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• 2008.08a
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• pp.81-81
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• 2008

• Proceedings of the Korean Vacuum Society Conference
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• 2007.08a
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• pp.289-289
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• 2007

• Journal of the Korean Vacuum Society
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• v.4 no.2
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• pp.217-223
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• 1995

절연보호막에 따른 AI-1%Si 박막배선의 평균수명(MTF, Mean-Time-to-Failure) 및 electromigration에 대한 저항성, 즉 활성화에너지(Q)변화 등을 측정 비교하였다. 박막배선은 $5000\AA$두께로 열산화막 처리된 p-Si(100)기판위에 $7000\AA$의 AI-1%Si을 증착한 후 photolithography 공정으로 형성시켰다. Electromigration test를 위한 박막배선은 $3\mu$m의 폭과 $400\mu$m, $1600\mu$m의 두 가지 길이를 가지며 절연보호막 효과를 알아보기 위해 그 위에 $3000\AA$의 두께로 SiO2, PSG, Si3N4등 절연보호막을 APCVD 및 PECVD를 이용하여 각각 증착시켰다. 가속화 실험을 위해 인가된 전류밀도는 4.5X106A/cm2이었고 180, 210, $240^{\circ}C$온도에서 d.c. 인가 후의 저항변화를 측정하여 평균수명을 구한 후 Black 방정식을 이용하여 활성화에너지를 측정하였다. AI-1%Si 박막배선에서 electromigration에 대한 활성화에너지값은 $400\mu$m길이의 경우 0.44eV(nonpassivated), 0.45eV(Si3N4 passivated), 0.50 eV(PSG passivated), 그리고 0.66 eV(SiO2 passivated)로 각각 측정되었다. $1600\mu$m 길이의 AI-1%Si 박막배선 실험에서도 같은 절연보호막 효과가 관찰되었다. 따라서 SiO2, PSG, Si3N4등 절연보호막은 AI-1%Si 박막배선에서의 electromigration에 대한 저항력을 높여 결함방지효과를 보이며 수명을 향상시킨다. SiO2의 절연보호막의 경우가 AI-1%Si 박막배선의 electromigration에 대한 가장 강한 저항력을 보이며 평균수명도 높게 나타났다.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.2 s.31
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• pp.29-35
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• 2004

Hafnium-oxide gate dielectric films deposited by a metal organic chemical vapor deposition technique on a $N_2-plasma$ treated SiNx and a hydrogen-terminated Si substrate have been investigated. In the case of $HfO_2$ film deposited on a hydrogen-terminated Si substrate, suppressed crystallization with effective carbon impurity reduction was obtained at $450^{\circ}C$. X-ray photoelectron spectroscopy indicated that the interface layer was Hf-silicate rather than phase separated Hf-silicide and silicon oxide structure. Capacitance-voltage measurements show equivalent oxide thickness of about 2.6nm for a 5.0 nm $HfO_2/Si$ single layer capacitor and of about 2.7 nm for a 5.7 nm $HfO_2/SiNx/Si$ stack capacitor. TEM shows that the interface of the stack capacitor is stable up to $900^{\circ}C$ for 30 sec.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.255-255
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• 2010

Recently, nonvolatile memories (NVM) of various types have been researched to improve the electrical performance such as program/erase voltages, speed and retention times. Also, the charge trap memory is a strong candidate to realize the ultra dense 20-nm scale NVM. Furthermore, the high charge efficiency and the thermal stability of SiC nanocrystals NVM with single $SiO_2$ tunnel barrier have been reported. [1-2] In this study, the SiC charge trap NVM was fabricated and electrical properties were characterized. The 100-nm thick Poly-Si layer was deposited to confined source/drain region by using low-pressure chemical vapor deposition (LP-CVD). After etching and lithography process for fabricate the gate region, the $Si_3N_4/SiO_2/Si_3N_4$ (NON) and $SiO_2/Si_3N_4/SiO_2$ (ONO) barrier engineered tunnel layer were deposited by using LP-CVD. The equivalent oxide thickness of NON and ONO tunnel layer are 5.2 nm and 5.6 nm, respectively. By using ultra-high vacuum magnetron sputtering with base pressure 3x10-10 Torr, the 2-nm SiC and 20-nm $SiO_2$ were successively deposited on ONO and NON tunnel layers. Finally, after deposited 200-nm thick Al layer, the source, drain and gate areas were defined by using reactive-ion etching and photolithography. The lengths of squire gate are $2\;{\mu}m$, $5\;{\mu}m$ and $10\;{\mu}m$. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer, E4980A LCR capacitor meter and an Agilent 81104A pulse pattern generator system. The electrical characteristics such as the memory effect, program/erase speeds, operation voltages, and retention time of SiC charge trap memory device with barrier engineered tunnel layer will be discussed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.429-429
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• 2007

For various applications of liquid crystal displays (LCDs), the uniform alignment of liquid crystal (LC) molecules on treated surfaces is significantly important. Generally, a rubbing method has been widely used to align the LC molecules on polyimide (PI) surfaces. Rubbed PI surfaces have suitable characteristics, such as uniform alignment. However, the rubbing method has some drawbacks, such as the generation of electrostatic charges and the creation of contaminating particles. Thus, we strongly recommend a non contact alignment technique for future generations of large high-resolution LCDs. Most recently, the LC aligning capabilities achieved by ultraviolet and ion-beam exposures which are non contact methods, on diamond-like carbon (DLC) inorganic thin film layers have been successfully studied because DLC thin films have a high mechanical hardness, a high electrical resistivity, optical transparency, and chemical inertness. In addition, nitrogen-doped DLC (NDLC) thin films exhibit properties similar to those of the DLC thin films and a higher thermal stability than the DLC thin films because C:N bonding in the NDLC thin filmsis stronger against thermal stress than C:H bonding in the DLC thin films. Our research group has already studied the NDLC thin films by an ion-beam alignment method. The $SiN_x$ thin films deposited by plasma-enhanced chemical vapor deposition are widely used as an insulation layer for a thin film transistor, which has characteristics similar to those of DLC inorganic thin films. Therefore, in this paper, we report on LC alignment effects and pretilt angle generation on a $SiN_x$, thin film treated by ion-beam irradiation for various N ratios

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.2
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• pp.85-90
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• 2014

Ag paste has been used in the front electrode of the Si-solar cell. It is composed by Ag powder, glass frit, binder, solvent and dispersant. The role of the binder and the solvent is to make a flow and a printing property. However, it was not enough to report the printing properties with the variation of binder in the controled viscosity. In this study, we selected 3 kinds of typical binder which were used as binder for the paste in the industry, such as Ethyl cellulose, Hydroxypropyl cellulose and Acrylic. Ag pastes using these were prepared, controled viscosity and printed on the SiNx coated Si wafer. In the 'A paste' used Acrylic binder, printed hight was highest and 'H paste' used Hydroxypropyl cellulose binder was lowest. Because 'H paste' was high viscosity due to the molecular weight, the solvent was added in the paste to control the viscosity. Therefore, the content of solid was lower in 'H paste'. The relative pattern width which is related to the spreading of paste was the best in the case of 'H paste' and 'EH paste' at $30^{\circ}C$. It is thought that the optimization of the relative pattern width is possible for a paste by the controling shear thinning phenomenon. In the case of 'A paste', though printing hight was best, the pattern width was dependant on the temperature.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.05a
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• pp.152-155
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• 2006

Carbon nitride ($CN_X$) films were prepared by reactive RF magnetron sputtering system at various deposition conditions and the C-V characteristics of MIS(metal - insulator - semiconductor) capacitors that have the structures of Al/$CN_x$/p-Si/Al and Al/$CN_x$/$Si_3N_4$/p-Si/Al were investigated. The resistivity of carbon nitride was above $2.40{\times}10^8{\Omega}{\cdot}cm$ at room temperature. The C-V plot showed a typical capacitance-voltage characteristics of semiconductor insulating layers, while it showed hysterisis due to interface charges. Amorphous carbon nitride (a-$CN_x$) films, that have relatively high resistivity and low dielectric constant could be useful as interlayer insulator materials of VLSI(very large-scale integration) and ULSI(ultra large-scale integration).