• 대한전자공학회논문지
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• 제21권1호
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• pp.45-50
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• 1984

결정면이 (100)인 실리콘 웨이퍼 위에 열확산(thermal diffusion)법을 이용하여 표면에 V형 흠이 형성된 N+P 태양전지를 제작하였다. (100) 실리콘 표면에 V형 홈을 형성시키기 위하여 이방성 부식용액으로는 etylendiamine, water, pyrocathecol 혼합용액을 사용하였다. 100mW/㎠의 조명아래에서 V형홈을 형성시킨 태양전지가 효율면에서 일반 평면 N+P 태양전지보다는 2.5∼3.5%, texturized 태양전지보다는 0.4∼0.6%정도의 증가를 보였다.

• Journal of the Optical Society of Korea
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• 제15권1호
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• pp.1-3
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• 2011

We characterize and analyze silicon avalanche photodetectors (APDs) fabricated with standard complementary metal-oxide-semiconductor (CMOS) technology. Current characteristics, responsivity, avalanche gain, and photodetection bandwidth of CMOS-APDs based on two types of PN junctions, N-well/P-substrate and $P^+$/N-well junctions, are compared and analyzed. It is demonstrated that the CMOS-APD using the $P^+$/N-well junction has higher responsivity as well as higher photodetection bandwidth than N-well/P-substrate. In addition, the important factors influencing CMOS-APD performance are clarified from this investigation.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2007년도 춘계학술대회B
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• pp.2453-2458
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• 2007

The performance of polysilicon thin film transistor (p-Si TFT) has an important role in the operation of active matrix liquid crystal displays. To fabricate the p-Si TFTs that have uniform characteristics, understanding of the recrystallization mechanism of silicon is crucial. Especially, the analysis of the transient temperature variation and the liquid-solid interface motion is required to find the mechanism. The thermal conductivity is one of the most important parameters to understand the mechanism. In this work, a KrF eximer laser beam was irradiated to amorphous silicon thin films. We measured the transient reflectivity at the wavelength of 633 nm. We carried out the numerical simulation of one dimension conduction equation so that we determined the most well-fitted thermal conductivity by comparing the numerically obtained transient reflectivity with the experimentally measured one. The experimentally determined thermal conductivity of amorphous silicon thin films is 1.5 W/mK.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 C
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• pp.1209-1212
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• 1995

This paper presents a capacitive humidity sensor using porous silicon layers formed tom the anodization of p-type silicon in HF solution. The upper electrodes consist of many aluminum strips over porous silicon, between which the porous silicon is etched away. The sensor showed a good sensitivity(20pF/%RH) and lineaity in the range of 40%RH$\sim$80%RH, a hysteresis of ${\pm}2%$ RH, and a slow transient response. These preliminary resluts show that futher improvement can still be expected.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 D
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• pp.1558-1560
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• 1998

Macroporous silicon diaphragms 20 to $200{\mu}m$ thick have been formed on p-type silicon by anistropic etching in TMAH solution and then by electrochemical etching in HF-ethanol-water solution with an applied current. The pores have a pore diameter of $1.5{\sim}2{\mu}m$, with a depth of $20{\sim}30{\mu}m$ and are not interconnected, which are in sharp contrast to the porous silicon reported previouly for similarly doped p-Si. The fabrication of macroporous silicon and free-standing diaphragms is expected to offer new applications for microsensors, micro-machining, and separators.

• 전자공학회논문지A
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• 제29A권2호
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• pp.55-62
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• 1992

Polycrystalline silicon ingots were manufactured using the casting method for polycrystalline silicon solar cells. These ingots were cut into wafers and ten n$^{+}$p type solar cells were made through the following simple process` surface etching, n$^{+}$p junction formation, metalization and annealing. For the grain boundary passivation, the samples were oxidized in O$_2$ for 5 min. at 80$0^{\circ}C$ prior to diffusion in Ar for 100 min. at 95$0^{\circ}C$. The conversion efficiency of polycrystalline silicon solar cells made from these wafers showed about 70-80% of those of the single crystalline silicon solar cell and superior conversion efficiency, compared to those of commercial polycrystalline wafers of Wacker Chemie. The maximum conversion efficiency of our wafers was indicated about 8%(without AR coating) in spite of such a simple fabrication method.

• 대한전자공학회논문지
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• 제26권12호
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• pp.2010-2015
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• 1989

A SOI was fabricated by the FIPOS technique using n/p+/p silicon structure. Fabricated silicon island which has 3\ulcorner thickness and 100\ulcorner width was investigated by measuring van der Pauw resistivity, Hall mobility, dielectric breakdown voltage and leakage current. Hall mobility of the SOI was measured to be 300-500cm\ulcornerV.sec and its breakdown field was 1-2 MV/cm. The cross-sectional geometries of the SOI island were examined by SEM and optical microscope.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(I)
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• pp.509-512
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• 1987

We report that the optimum substrate temperature to fabricate a-Si:H $n^+-p-p^+$ cell decreases with increasing the boron concentration in the Player. The results can be explained as the dependence of substrate temperature for the relaxation of silicon atoms and the bonded hydrogen concentration in the player.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2008년도 추계종합학술대회 B
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• pp.604-607
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• 2008

본 연구에서는 NAND 플래시메모리를 위한 기본 셀로서 p채널 SONOS (silicon-oxide-nitride-oxide-silicon) 트랜지스터를 제작하고 이것의 메모리특성을 조사하였다. SONOS 트랜지스터의 제작은 $0.13{\mu}m$ low power용 standard logic 공정기술을 사용하였다. 게이트 절연막의 두께는 터널 산화막 $20{\AA}$, 질화막 $14{\AA}$, 그리고 블로킹산화막의 두께는 $49{\AA}$이다. 제작된 SONOS 트랜지스터는 낮은 쓰기/지우기 전압, 빠른 지우기 속도, 그리고 비교적 우수한 기억유지특성과 endurance 특성을 나타내었다.

• 한국결정성장학회지
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• 제19권6호
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• pp.293-297
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• 2009

본 연구에서는 p형 단결정 규소 기판을 에칭시켜 다층구조를 갖는 DBR 및 Microcavity 다공질규소를 제작하고, 그 반사율 스펙트럼을 조사하였다. 그 결과 다층구조를 갖는 다공질규소의 반사율 스펙트럼에서 프린지 패턴의 수는 단일층 다공질규소의 경우보다 상대적으로 많았으며, 특정 파장에서 반사율은 90 % 이상으로 나타났다. 그리고 DBR 다공질규소에서 최대 반사율 봉우리의 FWHM 값은 33 nm로 매우 좁게 나타났다.