Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Self Heating Effects in Sub-nm Scale FinFETs

  • Agrawal, Khushabu (Department of Electrical and Computer Engineering, Sungkyunkwan University) ;
  • Patil, Vilas (Materials and Devices Laboratory of Nanoelectronics, North Maharashtra University) ;
  • Yoon, Geonju (Department of Electrical and Computer Engineering, Sungkyunkwan University) ;
  • Park, Jinsu (Department of Electrical and Computer Engineering, Sungkyunkwan University) ;
  • Kim, Jaemin (Department of Electrical and Computer Engineering, Sungkyunkwan University) ;
  • Pae, Sangwoo (Technology Quality & Reliability Foundry Division, Samsung Electronics Co., LTD.) ;
  • Kim, Jinseok (Technology Quality & Reliability Foundry Division, Samsung Electronics Co., LTD.) ;
  • Cho, Eun-Chel (Department of Electrical and Computer Engineering, Sungkyunkwan University) ;
  • Junsin, Yi (Department of Electrical and Computer Engineering, Sungkyunkwan University)
  • Received : 2019.09.03
  • Accepted : 2019.11.29
  • Published : 2020.03.01
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Abstract

Thermal effects in bulk and SOI FinFETs are briefly reviewed herein. Different techniques to measure these thermal effects are studied in detail. Self-heating effects show a strong dependency on geometrical parameters of the device, thereby affecting the reliability and performance of FinFETs. Mobility degradation leads to 7% higher current in bulk FinFETs than in SOI FinFETs. The lower thermal conductivity of SiO2 and higher current densities due to a reduction in device dimensions are the potential reasons behind this degradation. A comparison of both bulk and SOI FinFETs shows that the thermal effects are more dominant in bulk FinFETs as they dissipate more heat because of their lower lattice temperature. However, these thermal effects can be minimized by integrating 2D materials along with high thermal conductive dielectrics into the FinFET device structure.

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References

  1. S. W. Yoo, H. Kim, M. Kang, and H. Shin, J. Semicond. Technol. Sci., 16, 204 (2016). [DOI: https://doi.org/10.5573/JSTS.2016.16.2.204]
  2. H. Jiang, N. Xu, B. Chen, L. Zeng, Y. He, G. Du, X. Liu, and X. Zhan, Semicond. Sci. Technol., 29, 115021 (2014). [DOI: https://doi.org/10.1088/0268-1242/29/11/115021]
  3. E. Bury, B. Kaczer, P. Roussel, R. Ritzenthaler, K. Raleva, D. Vasileska, and G. Groeseneken, Proc. 2014 IEEE International Reliability Physics Symposium (IEEE, Waikoloa, USA, 2014) p. 14. [DOI: https://doi.org/10.1109/IRPS.2014.6861186]
  4. T. Takashi, T. Matsuki, T. Shinada, Y. Inoue, and K. Uchida, IEEE J. Electron Devices Soc., 4, 365 (2016). [DOI: https://doi.org/10.1109/JEDS.2016.2568261]
  5. M. I. Khan, A. R. Buzdar, and F. Lin, Proc. 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) (IEEE, Guilin, China, 2014) p. 7021443. [DOI: https://doi.org/10.1109/ICSICT.2014.7021443]
  6. B. Gonzalez, J. B. Roldan, B. Iniguez, A. Lazaro, and A. Cerdeira, Microelectron. J., 46, 320 (2015). [DOI: https://doi.org/10.1016/j.mejo.2015.02.003]
  7. S. Venkateswarlu, A. Sudarsanan, S. G. Singh, and K. Nayak, IEEE Trans. Electron Devices, 65, 2721 [DOI: https://doi.org/10.1109/TED.2018.2834979]
  8. E. R. Hsieh, M. R Jiang, J. L. Lin, S. S. Chung, T. P. Chen, S. A. Huang, T. J. Chen, and O. Cheng, IEEE J. Electron Devices Soc., 6, 866 (2018). [DOI: https://doi.org/10.1109/JEDS.2018.2859276]
  9. F. Stellari, K. A. Jenkins, A. J. Weger, B. Linder, and P. Song, Proc. 2015 IEEE International Reliability Physics Symposium (IEEE, Monterey, USA 2015). [DOI: https://doi.org/10.1109/IRPS.2015.7112672]
  10. I. Hossain, A. Anwar, M. Z. Baten, and Q.D.M. Khosru, Proc. International Conference on Electrical & Computer Engineering (ICECE 2010) (IEEE, Dhaka, Bangladesh, 2010) p. 400. [DOI: https://doi.org/10.1109/icelce.2010.5700713]
  11. K. Derbyshire, Will Self-Heating Stop FinFETs, https://semiengineering.com/will-self-heating-stop-finfets/ (2017).
  12. J. U. Lee, D. Yoon, H. Kim, S. W. Lee, and H. Cheong, Phys. Rev. B, 83, 081419 (2011). [DOI: https://doi.org/10.1103/PhysRevB.83.081419]
  13. US Patent: Z. Krivokapic and B. Sahu, FinFET Device with a Graphene Gate Electrode and Method of Forming Same, 2014/OO15O15 A1, (2014).
  14. X. Wu, V. Varshney, J. Lee, Y. Pang, A. K. Roy, and T. Luo, Chem. Phys. Lett., 669, 233 (2017). [DOI: https://doi.org/10.1016/j.cplett.2016.12.054]
  15. T. S. Pan, M. Gao, Z. L. Huang, Y. Zhang, X. Feng, and Y. Lin, Nanoscale, 7, 13561 (2015). [DOI: https://doi.org/10.1039/c5nr02750k]
  16. A. L. Moore and L. Shi, Mater. Today, 17, 163 (2014). [DOI:https://doi.org/10.1016/j.mattod.2014.04.003]