DOI QR코드

DOI QR Code

VCO Design using NAND Gate for Low Power Application

  • Kumar, Manoj (University School of Information and Communication Technology GGS Indraprastha University)
  • Received : 2016.02.20
  • Accepted : 2016.05.02
  • Published : 2016.10.30

Abstract

Voltage controlled oscillator (VCO) is widely used circuit component in high-performance microprocessors and modern communication systems as a frequency source. In present work, VCO designs using the different combination of NAND gates with three transistors and CMOS inverter are reported. Three, five and seven stages ring VCO circuits are designed. Coarse and fine tuning have been done using two different supply sources. The frequency with coarse tuning varies from 3.31 GHz to 5.60 GHz in three stages, 1.77 GHz to 3.26 GHz in five stages and 1.27 GHz to 2.32 GHz in seven stages VCO respectively. Moreover, for fine tuning frequency varies from 3.70 GHz to 3.94 GHz in three stages, 2.04 GHz to 2.18 GHz in five stages and 1.43 GHz to 1.58 GHz in seven stages VCO respectively. Results of power consumption and phase noise for the VCO circuits are also been reported. Results of proposed VCO circuits have been compared with previously reported circuits and present circuit approach show significant improvement.

Keywords

References

  1. Hsu, T. Y., Wang, C. C., & Lee, C. Y.: Design and analysis of a portable high-speed clock generator. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 48, issue. 4, pp. 367-375. (2001) https://doi.org/10.1109/82.933795
  2. Boerstler, D. W.: A low-jitter PLL clock generator for microprocessors with lock range of 340-612 MHz. IEEE Journal of Solid-State Circuits, vol. 34 no. 4, pp. 513-519. (1999) https://doi.org/10.1109/4.753684
  3. Staszewski, R. B., & Balsara, P. T.: Phase-domain all-digital phase-locked loop. IEEE Transactions on Circuits and Systems II: Express Briefs, vol.52, no. 3, pp.159-163. (2005) https://doi.org/10.1109/TCSII.2004.842067
  4. Lee, S. Y., & Hsieh, J. Y.: Analysis and implementation of a 0.9-V voltage-controlled oscillator with low phase noise and low power dissipation. IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 55, no. 7, pp. 624-627. (2008) https://doi.org/10.1109/TCSII.2008.921574
  5. Craninckx, J., & Steyaert, M. S.: A 1.8-GHz CMOS low-phase-noise voltage-controlled oscillator with prescaler. IEEE Journal of Solid-State Circuits, vol. 30, no.12, pp. 1474-1482. (1995) https://doi.org/10.1109/4.482195
  6. Catli, B., & Hella, M. M.: A 0.5-V 3.6/5.2 GHz CMOS multi-band LC VCO for ultra low-voltage wireless applications. IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp. 996-999. (2008)
  7. Kumar, M., Arya, S. K., & Pandey, S.: Low power digitally controlled oscillator designs with a novel 3-transistor XNOR gate. Journal of Semiconductors, vol. 33, no. 3, pp. 035001. (2012)
  8. De Paula, L. S., Susin, A. A., & Bampi, S.: A wide band CMOS differential voltage-controlled ring oscillator. In Proceedings of the 21st ACM Annual Symposium on integrated Circuits and System Design. pp. 85-89. (2008)
  9. Deen, M. J., Kazemeini, M. H., & Naseh, S.: Performance characteristics of an ultra-low power VCO. International Symposium on Circuits and Systems, 2003, ISCAS'03. vol. 1, pp. 697. (2003)
  10. Hajimiri, A., Limotyrakis, S., & Lee, T. H.: Jitter and phase noise in ring oscillators. IEEE Journal of Solid-State Circuits, vol. 34, no. 6, pp.790-804. (1999) https://doi.org/10.1109/4.766813
  11. Sadhu, B., Ferriss, M., Natarajan, A. S., Yaldiz, S., Plouchart, J. O., Rylyakov, A. V., & Friedman, D.: A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasing. IEEE Journal of Solid-State Circuits, vol. 48, no.5, pp. 1138-1150. (2013) https://doi.org/10.1109/JSSC.2013.2252513
  12. Enam, S. K., & Abidi, A. A.: A 300-MHz CMOS voltage-controlled ring oscillator. IEEE Journal of Solid-State Circuits, vol. 25, no. 1, pp. 312-315. (1990) https://doi.org/10.1109/4.50320
  13. Panigrahi, J. K., & Acharya, D. P.: Performance analysis and design of wideband CMOS voltage controlled ring oscillator. IEEE International Conference on Industrial and Information Systems (ICIIS), pp. 234-238. (2010)
  14. Fahs, B., Ali-Ahmad, W. Y., & Gamand, P.: A Two-Stage Ring Oscillator in 0.13 ${\mu}m$ CMOS for UWB Impulse Radio. IEEE Transactions on Microwave Theory and Techniques, vol. 57, no. 5, pp. 1074-1082. (2009) https://doi.org/10.1109/TMTT.2009.2017246
  15. Lee, S. Y., Amakawa, S., Ishihara, N., & Masu, K.: Low-phase-noise wide-frequency-range ring-VCObased scalable PLL with subharmonic injection locking in 0.18 ${\mu}m$ CMOS. In IEEE International Microwave Symposium Digest (MTT), pp. 1178-1181. (2010)
  16. Eken, Y. A., & Uyemura, J. P.: A 5.9-GHz voltagecontrolled ring oscillator in 0.18-${\mu}m$ CMOS. IEEE Journal of Solid-State Circuits, vol. 39, no. 1, pp. 230-233. (2004) https://doi.org/10.1109/JSSC.2003.820869
  17. De Paula, Luciano Severino, Sergio Bampi, Eric Fabris, and Altamiro Amadeu Susin.: A high swing low power CMOS differential voltage-controlled ring oscillator. 14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007, pp 498-501. (2007)
  18. Kim, H. R., Cha, C. Y., Oh, S. M., Yang, M. S., & Lee, S. G.: A very low-power quadrature VCO with back-gate coupling. IEEE Journal of Solid-State Circuits, vol. 39, no. 6, pp. 952-955. (2004) https://doi.org/10.1109/JSSC.2004.827798
  19. Haijun, G., Lingling, S., Xiaofei, K., & Liheng, L.: A low-phase-noise ring oscillator with coarse and fine tuning in a standard CMOS process. Journal of Semiconductors, vol. 33, no. 7, pp. 075004. (2012) https://doi.org/10.1088/1674-4926/33/7/075004
  20. Kumar, M., Arya, S., & Pandey, S.: Ring VCO Design with Variable Capacitance XNOR Delay Cell. Journal of the Institution of Engineers (India): Series B, pp. 1-9. (2014)
  21. Ramazani, Abbas, Sadegh Biabani, and Gholamreza Hadidi.: CMOS ring oscillator with combined delay stages. AEU-International Journal of Electronics and Communications, vol. 68, issue 6, pp. 515-519. (2014) https://doi.org/10.1016/j.aeue.2013.12.008
  22. Jin, Jie.: Low power current-mode voltage controlled oscillator for 2.4 GHz wireless applications. Computers & Electrical Engineering vol. 40, issue 1, pp. 92-99. (2014) https://doi.org/10.1016/j.compeleceng.2013.11.013
  23. Sanchez-Azqueta, Carlis, Santiago Celma, and Francisco Aznar.: A 0.18 ${\mu}m$ CMOS ring VCO for clock and data recovery applications. Microelectronics Reliability, vol. 51, issue 12, pp. 2351-2356. (2011) https://doi.org/10.1016/j.microrel.2011.05.005
  24. Thabet, H., Meillere, S., Masmoudi, M., Seguin, J. L., Barthelemy, H., & Aguir, K.: A low power consumption CMOS differential-ring VCO for a wireless sensor. Analog Integrated Circuits and Signal Processing vol. 73, pp. 731-740. (2012) https://doi.org/10.1007/s10470-012-9914-8
  25. Li, Jing, Ning Ning, Ling Du, Qi Yu, and Yang Liu.: The Impact of Gate Leakage Current on PLL in 65 nm Technology: Analysis and Optimization. JSTS: Journal of Semiconductor Technology and Science 12, no. 1, pp. 99-106. (2012) https://doi.org/10.5573/JSTS.2012.12.1.99

Cited by

  1. Low Power, Ring VCO with Pre-Charge and Pre-Discharge Circuit for 4 GHz–6.1 GHz Applications in 0.18 μm CMOS pp.1793-6454, 2018, https://doi.org/10.1142/S0218126619501822
  2. Design of CMOS-based low-power high-frequency differential ring VCO pp.2168-1732, 2018, https://doi.org/10.1080/21681724.2018.1477181