I. INTRODUCTION
MOSFET is the key component in high-frequency power converters, and a well-performing driver is the basic demand and guarantee for its proper and reliable operation [1]-[6]. MOSFETs operate at wide range of duty cycles in various applications, such as inverters and DC-DC converters with wide operating ranges and quick responding capabilities. Meanwhile, isolation between control signals and power circuit is a must in several applications.
MOSFETs’ drivers can be classified as optical isolated, magnetic isolated, and special floating drive ICs according to the isolation methods. Level shift and bootstrap are mainly used in high-voltage floating drive ICs to power the drivers, and thus the circuits can be quite simple and reliable. However, these circuits can only be used in bridge serjavascript:linkChange(3);ies power converters and cannot realize fully galvanic isolation between the control and power circuits [7], [8]. The low-voltage driver ICs are mostly designed for special occasions, such as synchronous rectification circuits. This drawback limits their application. In addition, these circuits cannot guarantee galvanic isolation between the control and power circuits. Isolated driver with optoelectronic isolation can realize isolation for signals with wide range of duty cycles, but auxiliary isolated power supplies are needed. Unfortunately, optical isolation can hardly satisfy the demands for high-frequency power converters because of long transmit time of normal opto-couplers and weak anti-interference capabilities of high-speed opto-couplers [9], [10]. Generally, traditional magnetic isolated drivers can be used in high-frequency switching occasions. However, these drivers are typically limited by the magnetic reset time of coupling transformer [11], [12]; if the power converter operates in a wide range of duty cycles, such as in the case of SPWM inverters where duty cycles range in nearly 0%-100%, then designing proper components and parameters for traditional magnetic isolated drivers is difficult, which limits their utilization in various applications [13]-[15]. A circuit proposed in [16], [17] converts the pulse edges of the driving signal to narrow pulses, magnetically couples them to the secondary side, and the signal is then reconstructed and restored by the circuit on the secondary side. This circuit can sustain a wide range of duty cycles, but complicated circuits and large power loss remain to be solved.
To meet the requirements for the power MOSFETs’ driver at high frequency (up to 1 MHz) and both high-voltage and low-voltage isolated circumstances, a driver is investigated. The driver’s operation principle is analyzed and the key parameters are designed. Finally, the experimental waveforms are presented to verify the feasibility of the driver.
II. OPERATION PRINCIPLE AND DESIGN CONSIDERATION
A. Operation Principle
The basic topology of the investigated driver is shown in Fig. 1. Compared with traditional circuits, the main improvement is that a restore capacitor on the secondary side and an independent floating capacitor are added. The output stage is realized by a totem configuration, which can achieve quick charging and discharging of the gate-source capacitor.
Fig. 1.Basic topology of the driver.
The capacitor C1 sustains the DC component of the input PWM signal, while the AC component of the input is transmitted to the secondary side of the isolated transformer. The capacitor C2 and diode D2 restore the DC level at the secondary side. The capacitor C3 operates as an independent floating capacitor and supplies current to the totem output. The main operating waveforms are shown in Fig. 2.
Fig. 2.Key operating waveforms of the driver
The capacitance C3 is large enough to neglect the pulsation of the voltage across the capacitor C3. The capacitances of C1 and C2 are designed properly to neglect the voltage fluctuation in every switching period. The operating modes below are analyzed based on the aforementioned assumed conditions.
At turn-on, up is positive which turns on Q1, partially discharging C3 upon CGS, to turn on the MOSFET. The driving current in traditional magnetic isolated driver comes from the primary side of the transformer, and thus the rising rate is limited by the leakage inductor. On the contrary, driving energy comes from the capacitor C3 in Fig. 1, which enables fast rising of the gate voltage. When the energy storage capacitor C3 is discharged, this capacitor can be recharged through capacitor C2 and diode D1.
At turn-off, up is negative, and D2 is forward biased. CGS is discharged through Q2, which is saturated, turning off the MOSFET.
The voltage across the blocking capacitor C1 is the average of the input port voltage Uin is as follows:
where D denotes the duty cycle.
In the analysis below, turns ratio of the transformer is denoted as 1:n, the forward voltage drop is denoted as UD, the base-emitter voltage of the transistor is denoted as UBE, and the collector-emitter saturation voltage drop is denoted as UCE(sat).
When a high level Uin is inputted, the voltage across the primary side of the transformer is as follows:
The voltage across the secondary side is as follows:
The voltage across the capacitor C2 is as follows:
Thus, the voltage restored by the capacitor C2 is as follows:
As a result, the voltage of the floating supply capacitor C3 is as follows:
and the output of the totem is as follows:
Therefore, the output voltage across the gate-source is as follows:
When a low level 0 V is inputted, the voltage across the primary side of the transformer is as follows:
The voltage across the secondary side is as follows:
Thus, the voltage restored by the capacitor C2 is as follows:
and the output of the totem configuration is as follows:
The energy storage capacitor on the secondary side not only simplifies the circuit, but also avoids the resonance of coupling transformer leakage and gate capacitor. Therefore, smaller Rg can be used, and thus quick rising and falling edges can be obtained even at high-frequency switching. Meanwhile, the restore capacitor C2 can stabilize the voltage of C3 to avoid the influence of duty cycles. This statement can be verified via experiments.
Moreover, the galvanic isolation capability can be improved because of the decrease of the limitation of coupling transformer’s leakage inductor. In traditional magnetic coupling drivers, the coiling method of the transformer in Fig. 3(b) is commonly used instead of that in Fig. 3(a) because of the large leakage inductance. However, this large leakage inductance is no longer an issue because of the driver’s insensitivity to such leakage inductance. The galvanic isolation in Fig. 3(a) is better than that in Fig. 3(b) because no direct contact occurs between the primary and secondary windings. With this coiling method of the transformer and the insensitivity to the leakage inductance, the proposed scheme has advantages on galvanic isolation.
Fig. 3.Two different coiling methods of the transformer.
B. Design Consideration
1) Design for the Coupling Transformers: High permeability ferrite material with no air gap is selected considering high coupling coefficient and no energy storage needed in the transformer. Thus, the maximum magnetic flux density allowed, Bmax, is determined. Accordingly, the upper limitation of magnetic flux variation ΔB is chosen to be about one-third of Bmax.
According to Eq. (7), the turn ratio n is mainly decided by the amplitude of the PWM signal Uin and the driving voltage of MOSFET. The voltage drop caused by the semiconductor itself should be considered if necessary.
The magnetic core has to be kept unsaturated, and thus the turns should be designed to maintain limited magnetic flux variation ΔB. Then, the limitation can be derived as follows:
This equation illustrates that the lower limit of primary turns np is determined by the parameters of input signal (input voltage amplitude Uin, frequency fs, and duty cycle D), the magnetic core’s effective magnetic flux area Ae, and the allowed maximum magnetic flux density Bmax.
Meanwhile, to reduce the loss of magnetizing current of the transformer, the inductive coefficient AL of the specific magnetic core can be found in its datasheets, and the loss can be estimated by the following equation:
Therefore, the turns np and ns can be approximately determined.
2) Design for Capacitors: In terms of designing the capacitor C1 for blocking DC content of the input signal and capacitor C2 for level restore, the voltage across the capacitors should be kept almost unchanged per period, while the average voltage should change quickly according to the duty cycle. Thus, the capacitances should be the minimum values that meet the demands. On the contrary, the voltage of floating supply capacitor C3 should be kept during the whole operating life. Hence, an available maximum value should be better.
The equivalent circuit during turn-on is shown in Fig. 4 (the resistors Rg and Rgs, gate-source capacitor are neglected).
Fig. 4.Equivalent circuit during turn-on.
The parameters in Fig. 4 are all converted to the primary side. With the neglected parasitic resistance R, a simple L short for the leakage inductance of the transformer Ls, the equation can be derived as follows:
Therefore, a new equation can be derived as follows:
where
Eqs. (17)-(19) calculate the voltage ripples of capacitor C1, C2’, and C3’.
Oversized voltage ripples of capacitor C1 and C2 will unintentionally turn-on and turn-off the MOSFET, and thus the normal operation of totem configuration should be unaffected by the voltage ripples converted to the secondary side.
Notably, the analysis above neglects the effect caused by the magnetizing current. However, when the capacitance is small, the magnetizing current cannot be neglected and becomes the main factor. The voltage changes of capacitor C1 caused by the magnetizing current can be estimated as follows:
The selection of capacitor C1 should consider the two factors mentioned earlier.
To maintain the stable conductive characters of the power switch, the output voltage of the driver should be kept unchanged. In other words, the voltage ripple of the capacitor C3 should be limited to a certain range.
The voltage drop of capacitor C3 is determined by the power needed to drive the gate, and can be estimated as follows:
By solving the equation above, an approximate equation can be derived as follows:
where Qg denotes the gate charge of the driven power switch.
3) Design for Transistors: If the power supply capacitor C3 is large enough, then this capacitor can be regarded as an ideal voltage source. At this point, the maximum current at the switch’s turn-on and turn-off moment is as follows:
The turn-on and turn-off current of the totem configuration is the same as that of the switch. Thus, the peak current of the transistors should meet or exceed the driver’s peak current.
4) Design for Resistors: The resistors R1 and R2 (optional) are used to damp the oscillation caused by strap inductance and the gate capacitor. R1 can be selected according to the energy needed by the driver, and Rg can be chosen according to the required peak current and driving speed.
III. PRACTICAL DESIGN
To verify the accurateness of the analysis for the operation principle and design methods mentioned earlier, a practical example is designed based on driving the SiA920DJ type MOSFET by Vishay Corporation. This type contains two N-type MOSFETs, whose key parameters are as follows: VDS(max) = 8V, VGS(max) = 5V, and VGS(th)_min = 0.35V. This driver can drive both low-voltage and high-voltage MOSFETs where the control and power circuits should be isolated.
In this example, the PWM signal is generated by the digital signal processor. After going through an amplifier, the signal’s voltage difference between the high level and the low level is 1.9 V. The frequency ranges from 10 kHz to 1 MHz, and the designed output voltage is 4 V. When designing the parameters, the voltage fluctuation of capacitor C3 is limited to below 0.5 V, and the voltage fluctuation of capacitor C1 is limited to below 0.5 V after being converted to the secondary side.
The parameters of the circuit’s components are chosen as follows: Rgs = 10 kΩ, R2 = 200 Ω, Rg = 20 Ω, C1 = 1 μF, C2 = 0.33 μF, and C3 = 10 μF. In addition, the transistors use 2SC9013 and 2SC9015 for NPN-type and PNP-type, respectively. The magnetic core used is the type H10/6/5 by Nanjing New Conda Magnetic Industrial Co., Ltd. This core is made up of high permeability ferrite material called HP3. According to its datasheet[18], its inductance coefficient AL equals 5100 nH/N2 (tolerance ± 30%) under the measuring conditions of 10 kHz, 0.1 V, and 25 °C, and this type is a ring core with no gap. The primary and secondary winding numbers are 20 and 54, respectively. The turn ratio is 1:2.7, and coupling coefficient is about 0.999 that is calculated from the measuring results.
The input and output PWM waveforms at the switching frequencies of 50 kHz, 100 kHz, and 1 MHz are shown in Fig. 5. The rising and falling edges of the output voltage are sharp enough to turn-on and turn-off the MOSFET quickly.
Fig. 5.Waveforms at different frequencies.
The expanded waveforms embedded in Fig. 5(c) show that even at the frequency of 1 MHz, the turn-on and turn-off propagation delay is about 20 ns, and the rise and fall time is about 30 ns. Therefore, the signal can be transmitted by the circuit with low distortion and accurate duty cycle.
The driving waveforms when the switching frequency reaches 1 MHz and the duty cycles are 0.067 and 0.933 are shown in Fig. 6. This figure illustrates that the driver can truly suit the demands for high frequency and wide range of duty cycles.
Fig. 6.Waveforms at different duty ratios.
The resistor Rg is now replaced with a short wire to ensure the condition Rg = 0. The experimental waveforms are shown in Fig. 7. Zero Rg operation can be achieved, and the driver now performs better than the original driver. The result strongly proves the previous statement.
Fig. 7.Waveforms when Rg = 0.
An extra inductor is now added in series with the transformer to simulate a larger leakage inductance. The transformer is still the original transformer. The extra inductor is made by two turns of coils with the magnetic core the same as that of the transformer. The inductance is tested to be about 25 μH. The experimental waveforms are shown in Fig. 8. By comparing these waveforms, larger leakage inductance hardly affects the characteristics of the output. This comparison will verify the statement regarding the driver’s insensitivity to the leakage inductance.
Fig. 8.Waveforms with extra inductance of 25 μH and Rg = 0.
To realize the comparison with other approaches, two driver ICs for low-voltage applications are considered. One is the new driver IC PX3517 designed for synchronous rectified buck circuits. According to its datasheet[19], this driver can operate at the maximum switching frequency of 1.2 MHz. Other detailed data regarding this driver are listed in Table I. The other one is UCC27511A-Q1, a single channel, high-speed, low side gate driver IC. The corresponding data regarding this driver according to its datasheet[20] when VDD = 4.5 V are also listed in Table I. Notably, the test conditions vary for different driver ICs and different parameters.
TABLE ITYPICAL DATA OF THE THREE APPROACHES
From the comparison results, the preliminary prototype of the driver in the manuscript can perform similar propagation delay and rise and fall time in low-voltage applications. Although the speed-related data of this driver are a little larger than those of commercial ICs, the driver is realized by a printed circuit board with general commercial components.
IV. CONCLUSION
A MOSFET driver is investigated. The driver’s operation principle is analyzed and the design method for its key parameters is presented. The driver can operate at high frequency (up to 1 MHz). Almost full range of duty cycles can be transmitted without distortion.
This driver has several other important advantages. Firstly, fully galvanic isolation can be achieved with no extra floating supplies needed owing to the transformer. Secondly, by avoiding the oscillation in principle, no driving resistor is needed to damp the oscillation. As a result, the change rate of driving current caused by the driving resistor is not limited. Hence, sharp rising and falling edges of the output voltage can be realized. Finally, the design for the transformer can be made more flexible because the driver is insensitive to the leakage inductor of the transformer. Thus, the isolation voltage can be extended and the galvanic isolation performance is better.
Good performance and low power loss are verified via experiments. The isolated circuit is suitable for applications requiring high frequency and wide range of duty cycles.
References
- W. Ruxi, M. Danilovic, D. Boroyevich, C. Zheng, and R. Kaushik, “Transformer-isolated gate drive design for SiC JFET phase-leg module,” in Energy Conversion Congress and Exposition (ECCE), 2011 IEEE, pp. 1728-1733, 2011.
- Y. Chen, F. C. Lee, L. Amoroso, and H. P. Wu, “A resonant MOSFET gate driver with efficient energy recovery,” IEEE Trans. Power Electron., Vol. 19, No. 2, pp. 470-477, Mar. 2004. https://doi.org/10.1109/TPEL.2003.823206
- W. Eberle, Z. Zhiliang, L. Yan-Fei, and P. C. Sen, “A current source gate driver achieving switching loss savings and gate energy recovery at 1-MHz,” IEEE Trans. Power Electron., Vol. 23, No. 2, pp. 678-691, Mar. 2008. https://doi.org/10.1109/TPEL.2007.915769
- L. Yu, Z. Weimin, B. Blalock, L. Tolbert, and F. Wang, “A 10-MHz resonant gate driver design for LLC resonant DC-DC converters using GaN devices,” in Applied Power Electronics Conference and Exposition (APEC), 2014 Twenty-Ninth Annual IEEE, pp. 2093-2097, 2014.
- B. Zhao, H. Qin, X. Nie, and Y. Yan, “Evaluation of isolated gate driver for SiC MOSFETs,” in Industrial Electronics and Applications (ICIEA), 2013 8th IEEE Conference on, pp. 1208-1212, 2013.
- K. Yamaguchi, Y. Sasaki, and T. Imakubo, “Low loss and low noise gate driver for SiC-MOSFET with gate boost circuit,” in Industrial Electronics Society, IECON 2014 - 40th Annual Conference of the IEEE, pp. 1594-1598, 2014.
- C. Gu, Z. Yang, C. Yang, and M. Yang, “Design of on-line UPS based on boost converter,” in ICCAS-SICE, 2009, pp. 5494-5499, 2009.
- J.-H. Jung, H.-G. Ku, W.-S. Im, and J.-M. Kim, “A PWM control strategy for low-speed operation of three-level NPC inverter based on bootstrap gate drive circuit,” in Applied Power Electronics Conference and Exposition (APEC), 2014 Twenty-Ninth Annual IEEE, pp. 297-302, 2014.
- M. Imayavaramban and B. G. Fernandes, “Design and experimental verification of simple driver circuit for bi-directional switches used in matrix converter,” in Power Systems Conference and Exposition, 2006. PSCE '06. 2006 IEEE PES, pp. 1121-1126, 2006.
- A. Kadavelugu, G. Wang, S. Bhattacharya, and A. Huang, “Auxiliary power supply for solid state transformers,” in Energy Conversion Congress and Exposition (ECCE), 2012 IEEE, pp. 1426-1432, 2012.
- B.-R. Lin, C.-C. Yang, and D. Wang, “Analysis, design and implementation of an asymmetrical half-bridge converter,” in Industrial Technology, 2005. ICIT 2005. IEEE International Conference on, pp. 1209-1214, 2005.
- T. V. Nguyen, J.-C. Crebier, and P. Jeannin, “Design and control of a demagnetization circuit for permanent ON OFF operation in pulse transformer gate driver,” in Applied Power Electronics Conference and Exposition (APEC), 2012 Twenty-Seventh Annual IEEE, pp. 2472-2479, 2012.
- V. Nguyen, J.-C. Crebier, and P. Jeannin, “Compact, isolated and simple to implement gate driver using high frequency transformer,” in Applied Power Electronics Conference and Exposition (APEC), 2011 Twenty-Sixth Annual IEEE, pp. 1092-1098, 2011.
- K. S. Muhammad and D. D. C. Lu, “Magnetically isolated gate driver with leakage inductance immunity,” IEEE Trans. Power Electron., Vol. 29, No. 4, pp. 1567-1572, Apr. 2014. https://doi.org/10.1109/TPEL.2013.2279548
- L. Peng, R. Wu, X. Fang, Y. Toyoda, M. Akahane, M. Yamaji, H. Sumida, and J. K. O. Sin, “A simple low cost monolithic transformer for high-voltage gate driver applications,” IEEE Electron Device Lett., Vol. 35, No. 1, pp. 108-110, Jan. 2014. https://doi.org/10.1109/LED.2013.2291785
- J. M. Espi, R. Garcia-Gil, and J. Castello. “Isolated FET pulse driver reduces size and power consumption,” in EDN, 2006, pp. 98, 2006.
- J. Castello, J. M. Espi, and R. Garcia-Gil. “Isolated FET pulse driver increases power rate and duty cycle,” in EDN, 2010, pp. 48-49, 2010.
- Nanjing New Conda Magnetic Industrial Co., Ltd., H cores Datasheet,http://www.ncd.com.cn/uploadfile/201307/20130717150330657.pdf, 2013.
- PX3517 - Infineon Technologies, Synchronous Rectified Buck MOSFET driver IC PX3517 Datasheet Revision 2.0, http://www.infineon.com/dgdl/Infineon-PX3517-DS-v02_00-en.pdf?fileId=db3a304340155f3d01401a18d7042126, 2013.
- UCC27511A-Q1 | Gate Driver | AC/DC and Isolated DC/DC Power Supply | Technical documents, UCC27511A-Q1 Single-Channel High-Speed Low-Side Gate Driver With 4-A Peak Source and 8-A Peak Sink, http://www.ti.com.cn/cn/lit/ds/symlink/ucc27511a-q1.pdf, 2014.
Cited by
- Assessment of the Bootstrap Technique in Single-Phase Current-Fed Full-Bridge Resonant Inverters with Reactive Energy vol.25, pp.11, 2016, https://doi.org/10.1142/S0218126616501413