Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Effects of Annealing on Solution Processed n-ZTO/p-SiC Heterojunction

용액 공정으로 형성된 n-ZTO/p-SiC 이종접합 열처리 효과

  • Jeong, Young-Seok (Department of Electronic Materials Engineering, KwangWoon University) ;
  • Koo, Sang-Mo (Department of Electronic Materials Engineering, KwangWoon University)
  • 정영석 (광운대학교 전자재료공학과) ;
  • 구상모 (광운대학교 전자재료공학과)
  • Received : 2015.06.26
  • Accepted : 2015.07.24
  • Published : 2015.08.01
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Abstract

We investigated the effects of annealing on the electrical and thermal properties of ZTO/4H-SiC heterojunction diodes. A ZTO thin film layer was grown on p-type 4H-SiC substrate by using solution process. The ZTO/SiC heterojunction structures annealed at $500^{\circ}C$ show that $I_{on}/I_{off}$ increases from ${\sim}5.13{\times}10^7$ to ${\sim}1.11{\times}10^9$ owing to the increased electron concentration of ZTO layer as confirmed by capacitance-voltage characteristics. In addition, the electrical characterization of ZTO/SiC heterojunction has been carried out in the temperature range of 300~500 K. When the measurement temperature increased from 300 K to 500 K, the reverse current variation of annealed device is higher than as-grown device, which is related to barrier height in the ZTO/SiC interface. It is shown that annealing process is possible to control the electrical characteristics of ZTO/SiC heterojunction diode.

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References

  1. J. F. Felix, M. Aziz, C.I.L. de Araujo, W. M. de Azevedo, V. Anjos, E. F. da Silva Jr., and M. Henini, Semicond. Sci. Technol., 29 (2014)
  2. Y. S. Choi, J. W. Kang, D. K. Hwang, and S. J. Park, IEEE Trans. Electron Dev., 57 (2010).
  3. Y. H. Shin, M. D. Kim, J. E. Oh, M. S. Han, S. G. Kim, and K. S. Chung, Journal of the Korean Physical Society, 53, 2504 (2008). https://doi.org/10.3938/jkps.53.2504
  4. F. Yakuphanoglu, Y. Caglar, M. Caglar, and S. Ilican, Materials Science in Semiconductor Processing 13, 137 (2010). [DOI: http://dx.doi.org/10.1016/j.mssp.2010.05.005]
  5. Y. T. Shih, M. K. Wu, M. J. Chen, Y. C. Cheng, J. R. Yang, anzd M. Shiojiri, Appl. Phys. B, 98, 767 (2010). [DOI: http://dx.doi.org/10.1007/s00340-009-3809-0]
  6. J. H. Lee, J. C. Jung, M. S. Kang, and S. M. Koo, Journal of Nanoscience and Nanotechnology, 13, 7033 (2013). https://doi.org/10.1166/jnn.2013.7729
  7. S. J. Seo, Y. H. Hwang, and B. S. Bae, Electrochemical and Solid-State Letters, 13 (2010).
  8. S. H. Jeong, Y. M. Jeong, and J. H. Moon, J. Phys. Chem. C, 112 (2008). [DOI: http://dx.doi.org/10.1021/jp803475g]
  9. I. Shtepliuk, V. Khranovskyy, G. Lashkarev, V. Khomyak, V. Lazorenko, A. Ievtushenko, M. Syvajarvi, V. Jokubavicius, and R. Yakimova, Solid-State Electronics 81, 72 (2013). https://doi.org/10.1016/j.sse.2013.01.015
  10. C. Yuen, S. F. Yu, S. P. Lau, Rusli, and T. P. Chen, Appl. Phys. Lett., 86, 241111 (2005). https://doi.org/10.1063/1.1947889
  11. P. Chattopadhyay, J. Phys. D: Appl. Phys., 29 (1996).
  12. D. K. Schroder, Semiconductor Materials and Device Characterization, 3rd ed. (2006)
  13. J. S. Lee, Y. J. Kim, Y. U. Lee, Y. H. Kim, J. Y. Kwon, and M. K. Han, Jpn. J. Appl. Phys., 51, 061101 (2012). [DOI: http://dx.doi.org/10.7567/JJAP.51.061101]
  14. Y. J. Kim, B. S. Yang, S. H. Oh, S. J. Han, H. W. Lee, J. Y. Heo, J. K. Jeong, and H. J. Kim, ACS Appl. Mater. Interfaces, 5, 3255 (2013). https://doi.org/10.1021/am400110y
  15. H. Asil, K. Cinar, E. Gur, C. Coskun, and S. Tuzemen, International Journal of Physical Sciences, 8, 371 (2013).