한국전자파학회논문지 (The Journal of Korean Institute of Electromagnetic Engineering and Science)

  • 제24권10호
  • /
  • Pages.971-978
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  • 2013
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  • 1226-3133(pISSN)
  • /
  • 2288-226X(eISSN)
한국전자파학회 (The Korean Institute of Electromagnetic Engineering and Science)
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주파수 3체배기를 이용한 W 밴드 주파수 합성기 설계

Design of W Band Frequency Synthesizer Using Frequency Tripler

  • 조형준 (성균관대학교 정보통신대학) ;
  • ;
  • 김성균 (성균관대학교 정보통신대학) ;
  • 김병성 (성균관대학교 정보통신대학)
  • Cho, Hyung-Jun (College of Information and Communication Engineering, Sungkyunkwan University) ;
  • Cui, Chenglin (College of Information and Communication Engineering, Sungkyunkwan University) ;
  • Kim, Seong-Kyun (College of Information and Communication Engineering, Sungkyunkwan University) ;
  • Kim, Byung-Sung (College of Information and Communication Engineering, Sungkyunkwan University)
  • 투고 : 2013.07.18
  • 심사 : 2013.09.26
  • 발행 : 2013.10.31
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⟨ 이전 논문 다음 논문 ⟩

초록

본 논문에서는 65 nm RF CMOS 공정을 이용하여 26 GHz 위상 고정 루프(PLL)를 설계하고, 주파수 3체배기(tripler)를 이용하여 W 밴드 주파수 합성기를 설계하였다. 26 GHz VCO는 22.8~26.8 GHz, 3체배기의 출력은 74~75.6 GHz의 주파수 조정 범위를 갖는다. 제작한 주파수 합성기는 총 75.6 mW의 전력을 소모하며, 3체배기의 최종 출력은 1 MHz 오프셋에서 -75 dBc/Hz, 10 MHz 오프셋에서 -101 dBc/Hz의 위상 잡음 특성을 갖는다.

This work presents a W band frequency synthesizer which is composed of 26 GHz VCO, Phase Locked Loop and frequency tripler using 65 nm RF CMOS process. Frequency tuning range of 26 GHz VCO covers the band from 22.8~26.8 GHz and final output frequency of the tripler is from 74 to 75.6 GHz. The fabricated frequency synthesizer consumes 75.6 mW and its phase noise is -75 dBc/Hz at 1 MHz offset, -101 dBc/Hz 10 MHz offset respectively.

키워드

참고문헌

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