참고문헌
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- http://www.netlib.org/benchmark/livermorec
- Gaisler Research; http://www.gaisler.com/cms
- Jong-eun Lee et al, "Mapping loops on coarsegrained reconfigurable architectures using memory operation sharing," in Technical Report 02-34, Center for Embedded Computer Sys-tems(CECS), Univ. of California Irvine, Calif., 2002.
- Jonghee W. Yoon et al, "Temporal Mapping for Loop Pipelining on a MIMD style Coarse-Grained Reconfigurable Architecture," in Proc. of International SoC Design Conference, Oct., 2006.
피인용 문헌
- A Real-Time Virtual Re-Convergence Hardware Platform vol.12, pp.2, 2012, https://doi.org/10.5573/JSTS.2012.12.2.127